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authorDave Airlie <airlied@redhat.com>2012-12-08 07:17:07 +0400
committerDave Airlie <airlied@redhat.com>2012-12-10 14:03:58 +0400
commit1a1494def7eacbd25db05185aa2e81ef90892460 (patch)
tree40911f075b1fe527c6d20bf8c3070d4cdca11e97 /drivers/net/ethernet/smsc/smsc911x.c
parent8de9e417757fb9f130f55a38f4ee7027b60de1c7 (diff)
parent71bfe916ebe6d026cd3d0e41c398574fc1228e03 (diff)
downloadlinux-1a1494def7eacbd25db05185aa2e81ef90892460.tar.xz
Merge branch 'drm-next-3.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
Alex writes: Pretty minor -next pull request. We some additional new bits waiting internally for release. Hopefully Monday we can get at least some of them out. The others will probably take a few more weeks. Highlights of the current request: - ELD registers for passing audio information to the sound hardware - Handle GPUVM page faults more gracefully - Misc fixes Merge radeon test * 'drm-next-3.8' of git://people.freedesktop.org/~agd5f/linux: (483 commits) drm/radeon: bump driver version for new info ioctl requests drm/radeon: fix eDP clk and lane setup for scaled modes drm/radeon: add new INFO ioctl requests drm/radeon/dce32+: use fractional fb dividers for high clocks drm/radeon: use cached memory when evicting for vram on non agp drm/radeon: add a CS flag END_OF_FRAME drm/radeon: stop page faults from hanging the system (v2) drm/radeon/dce4/5: add registers for ELD handling drm/radeon/dce3.2: add registers for ELD handling radeon: fix pll/ctrc mapping on dce2 and dce3 hardware Linux 3.7-rc7 powerpc/eeh: Do not invalidate PE properly Revert "drm/i915: enable rc6 on ilk again" ALSA: hda - Fix build without CONFIG_PM of/address: sparc: Declare of_iomap as an extern function for sparc again PM / QoS: fix wrong error-checking condition bnx2x: remove redundant warning log vxlan: fix command usage in its doc 8139cp: revert "set ring address before enabling receiver" MPI: Fix compilation on MIPS with GCC 4.4 and newer ... Conflicts: drivers/gpu/drm/exynos/exynos_drm_encoder.c drivers/gpu/drm/exynos/exynos_drm_fbdev.c drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
Diffstat (limited to 'drivers/net/ethernet/smsc/smsc911x.c')
-rw-r--r--drivers/net/ethernet/smsc/smsc911x.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c
index 62d1baf111ea..c53c0f4e2ce3 100644
--- a/drivers/net/ethernet/smsc/smsc911x.c
+++ b/drivers/net/ethernet/smsc/smsc911x.c
@@ -2110,7 +2110,7 @@ static void __devinit smsc911x_read_mac_address(struct net_device *dev)
static int __devinit smsc911x_init(struct net_device *dev)
{
struct smsc911x_data *pdata = netdev_priv(dev);
- unsigned int byte_test;
+ unsigned int byte_test, mask;
unsigned int to = 100;
SMSC_TRACE(pdata, probe, "Driver Parameters:");
@@ -2130,9 +2130,22 @@ static int __devinit smsc911x_init(struct net_device *dev)
/*
* poll the READY bit in PMT_CTRL. Any other access to the device is
* forbidden while this bit isn't set. Try for 100ms
+ *
+ * Note that this test is done before the WORD_SWAP register is
+ * programmed. So in some configurations the READY bit is at 16 before
+ * WORD_SWAP is written to. This issue is worked around by waiting
+ * until either bit 0 or bit 16 gets set in PMT_CTRL.
+ *
+ * SMSC has confirmed that checking bit 16 (marked as reserved in
+ * the datasheet) is fine since these bits "will either never be set
+ * or can only go high after READY does (so also indicate the device
+ * is ready)".
*/
- while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
+
+ mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
+ while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
udelay(1000);
+
if (to == 0) {
pr_err("Device not READY in 100ms aborting\n");
return -ENODEV;