diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2018-05-18 21:31:28 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-05-20 06:24:46 +0300 |
| commit | 93f0fa75190fefee55408a1c0812fa54f576c61b (patch) | |
| tree | 8653a65e93dd5bb82360c13e4dc15ea9a8a0abee /drivers/net/ethernet/renesas | |
| parent | 230c184679d5517e9770275853cd3456d00d6599 (diff) | |
| download | linux-93f0fa75190fefee55408a1c0812fa54f576c61b.tar.xz | |
sh_eth: add EDMR.NBST support
The R-Car V3H (AKA R8A77980) GEther controller adds the DMA burst mode bit
(NBST) in EDMR and the manual tells to always set it before doing any DMA.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas')
| -rw-r--r-- | drivers/net/ethernet/renesas/sh_eth.c | 4 | ||||
| -rw-r--r-- | drivers/net/ethernet/renesas/sh_eth.h | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index d214ec09d401..800c196510eb 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -1434,6 +1434,10 @@ static int sh_eth_dev_init(struct net_device *ndev) sh_eth_write(ndev, mdp->cd->trscer_err_mask, TRSCER); + /* DMA transfer burst mode */ + if (mdp->cd->nbst) + sh_eth_modify(ndev, EDMR, EDMR_NBST, EDMR_NBST); + if (mdp->cd->bculr) sh_eth_write(ndev, 0x800, BCULR); /* Burst sycle set */ diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index a5b792ce2ae7..7d5aaba1384a 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -184,6 +184,7 @@ enum GECMR_BIT { /* EDMR */ enum DMAC_M_BIT { + EDMR_NBST = 0x80, EDMR_EL = 0x40, /* Litte endian */ EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, EDMR_SRST_GETHER = 0x03, @@ -505,6 +506,7 @@ struct sh_eth_cpu_data { unsigned bculr:1; /* EtherC have BCULR */ unsigned tsu:1; /* EtherC have TSU */ unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */ + unsigned nbst:1; /* E-DMAC has NBST bit in EDMR */ unsigned rpadir:1; /* E-DMAC have RPADIR */ unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */ unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */ |