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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2016-04-24 23:46:15 +0300
committerDavid S. Miller <davem@davemloft.net>2016-04-26 23:07:20 +0300
commitec65cfce508885e433445036ab46f4ec91d32c5c (patch)
tree0b27e7731eb91424deffdcde1489891530c436a6 /drivers/net/ethernet/renesas/sh_eth.c
parent97717edc69eabdcc8b1859af75a363790c3e9cb6 (diff)
downloadlinux-ec65cfce508885e433445036ab46f4ec91d32c5c.tar.xz
sh_eth: rename ARSTR register bit
The Renesas RZ/A1H manual names the software reset bit in the software reset register (ARSTR) ARST which makes a bit more sense than the ARSTR_ARSTR name used now by the driver -- rename the latter to ARSTR_ARST. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas/sh_eth.c')
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 3d7a40af5aab..07e29638299f 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -482,7 +482,7 @@ static void sh_eth_chip_reset(struct net_device *ndev)
struct sh_eth_private *mdp = netdev_priv(ndev);
/* reset device */
- sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);
+ sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
mdelay(1);
}
@@ -540,7 +540,7 @@ static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
struct sh_eth_private *mdp = netdev_priv(ndev);
/* reset device */
- sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);
+ sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
mdelay(1);
sh_eth_select_mii(ndev);
@@ -735,7 +735,7 @@ static void sh_eth_chip_reset_giga(struct net_device *ndev)
}
/* reset device */
- iowrite32(ARSTR_ARSTR, (void *)(SH_GIGA_ETH_BASE + 0x1800));
+ iowrite32(ARSTR_ARST, (void *)(SH_GIGA_ETH_BASE + 0x1800));
mdelay(1);
/* restore MAHR and MALR */