diff options
| author | Manish Chopra <manish.chopra@qlogic.com> | 2016-03-04 20:35:06 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-03-07 23:01:40 +0300 |
| commit | 55482edc25f0606851de42e73618f813f310d009 (patch) | |
| tree | 15b6223012bfbb4c4b780917f321b68360687537 /drivers/net/ethernet/qlogic/qede/qede.h | |
| parent | 088c86183012495b53ecc1c734909e5712a40b66 (diff) | |
| download | linux-55482edc25f0606851de42e73618f813f310d009.tar.xz | |
qede: Add slowpath/fastpath support and enable hardware GRO
This patch configures hardware to use GRO and adds support
for fastpath APIs to handle HW aggregated packets.
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: Manish Chopra <manish.chopra@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qede/qede.h')
| -rw-r--r-- | drivers/net/ethernet/qlogic/qede/qede.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/net/ethernet/qlogic/qede/qede.h b/drivers/net/ethernet/qlogic/qede/qede.h index 02e17d331f22..d023251544d9 100644 --- a/drivers/net/ethernet/qlogic/qede/qede.h +++ b/drivers/net/ethernet/qlogic/qede/qede.h @@ -160,6 +160,7 @@ struct qede_dev { u16 q_num_rx_buffers; /* Must be a power of two */ u16 q_num_tx_buffers; /* Must be a power of two */ + bool gro_disable; struct list_head vlan_list; u16 configured_vlans; u16 non_configured_vlans; @@ -188,6 +189,24 @@ struct sw_rx_data { unsigned int page_offset; }; +enum qede_agg_state { + QEDE_AGG_STATE_NONE = 0, + QEDE_AGG_STATE_START = 1, + QEDE_AGG_STATE_ERROR = 2 +}; + +struct qede_agg_info { + struct sw_rx_data replace_buf; + dma_addr_t replace_buf_mapping; + struct sw_rx_data start_buf; + dma_addr_t start_buf_mapping; + struct eth_fast_path_rx_tpa_start_cqe start_cqe; + enum qede_agg_state agg_state; + struct sk_buff *skb; + int frag_id; + u16 vlan_tag; +}; + struct qede_rx_queue { __le16 *hw_cons_ptr; struct sw_rx_data *sw_rx_ring; @@ -197,6 +216,9 @@ struct qede_rx_queue { struct qed_chain rx_comp_ring; void __iomem *hw_rxq_prod_addr; + /* GRO */ + struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM]; + int rx_buf_size; unsigned int rx_buf_seg_size; |