diff options
| author | Amit Cohen <amcohen@nvidia.com> | 2022-07-04 09:11:32 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-07-04 11:56:57 +0300 |
| commit | 058de325a4fbbdfbaf111d31a28918c3fd92e096 (patch) | |
| tree | 99e12522539a8296fe9ddf79fad5d4e9162a211d /drivers/net/ethernet/mellanox/mlxsw/reg.h | |
| parent | 2c3ae763eb703760a5388015582c10fd62d6ea18 (diff) | |
| download | linux-058de325a4fbbdfbaf111d31a28918c3fd92e096.tar.xz | |
mlxsw: Configure egress FID classification after routing
After routing, a packet needs to perform an L2 lookup using the DMAC it got
from the routing and a FID. In unified bridge model, the egress FID
configuration needs to be performed by software.
It is configured by RITR for both sub-port RIFs and FID RIFs. Currently
FID RIFs already configure eFID. Add eFID configuration for sub-port RIFs.
Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/reg.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/reg.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index 46ed2c1810be..520b990054eb 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -7113,10 +7113,11 @@ static inline void mlxsw_reg_ritr_rif_pack(char *payload, u16 rif) } static inline void mlxsw_reg_ritr_sp_if_pack(char *payload, bool lag, - u16 system_port, u16 vid) + u16 system_port, u16 efid, u16 vid) { mlxsw_reg_ritr_sp_if_lag_set(payload, lag); mlxsw_reg_ritr_sp_if_system_port_set(payload, system_port); + mlxsw_reg_ritr_sp_if_efid_set(payload, efid); mlxsw_reg_ritr_sp_if_vid_set(payload, vid); } |