summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/mellanox/mlx4/eq.c
diff options
context:
space:
mode:
authorYuval Atias <yuvala@mellanox.com>2014-05-25 18:47:27 +0400
committerDavid S. Miller <davem@davemloft.net>2014-06-02 06:16:29 +0400
commit70a640d0dae3a9b1b222ce673eb5d92c263ddd61 (patch)
tree89dbe2c36c695f2e4c79429f4362bc07df2cc1de /drivers/net/ethernet/mellanox/mlx4/eq.c
parentc8865b64b05b2f4eeefd369373e9c8aeb069e7a1 (diff)
downloadlinux-70a640d0dae3a9b1b222ce673eb5d92c263ddd61.tar.xz
net/mlx4_en: Use affinity hint
The “affinity hint” mechanism is used by the user space daemon, irqbalancer, to indicate a preferred CPU mask for irqs. Irqbalancer can use this hint to balance the irqs between the cpus indicated by the mask. We wish the HCA to preferentially map the IRQs it uses to numa cores close to it. To accomplish this, we use cpumask_set_cpu_local_first(), that sets the affinity hint according the following policy: First it maps IRQs to “close” numa cores. If these are exhausted, the remaining IRQs are mapped to “far” numa cores. Signed-off-by: Yuval Atias <yuvala@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4/eq.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/eq.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index d954ec1eac17..f91659e5fa13 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -1376,7 +1376,7 @@ int mlx4_test_interrupts(struct mlx4_dev *dev)
EXPORT_SYMBOL(mlx4_test_interrupts);
int mlx4_assign_eq(struct mlx4_dev *dev, char *name, struct cpu_rmap *rmap,
- int *vector)
+ int *vector, cpumask_var_t cpu_hint_mask)
{
struct mlx4_priv *priv = mlx4_priv(dev);
@@ -1411,6 +1411,15 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char *name, struct cpu_rmap *rmap,
}
mlx4_assign_irq_notifier(priv, dev,
priv->eq_table.eq[vec].irq);
+ if (cpu_hint_mask) {
+ err = irq_set_affinity_hint(
+ priv->eq_table.eq[vec].irq,
+ cpu_hint_mask);
+ if (err) {
+ mlx4_warn(dev, "Failed setting affinity hint\n");
+ /*we dont want to break here*/
+ }
+ }
eq_set_ci(&priv->eq_table.eq[vec], 1);
}
@@ -1441,6 +1450,8 @@ void mlx4_release_eq(struct mlx4_dev *dev, int vec)
irq_set_affinity_notifier(
priv->eq_table.eq[vec].irq,
NULL);
+ irq_set_affinity_hint(priv->eq_table.eq[vec].irq,
+ NULL);
free_irq(priv->eq_table.eq[vec].irq,
&priv->eq_table.eq[vec]);
priv->msix_ctl.pool_bm &= ~(1ULL << i);