diff options
author | Yanir Lubetkin <yanirx.lubetkin@intel.com> | 2015-02-28 13:09:34 +0300 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2015-03-06 13:47:07 +0300 |
commit | 9d17ce493a3ef1b140a4c831ba72fb435576c75a (patch) | |
tree | 623ae9ff63166b21c49b06ca3c71c980fbe9bb17 /drivers/net/ethernet/intel | |
parent | 23375a0fd549aa0a8c96b9f56a0b8120ae1389dd (diff) | |
download | linux-9d17ce493a3ef1b140a4c831ba72fb435576c75a.tar.xz |
e1000e: fix obscure comments
The interface to the device flash was modified in i219 and later HW.
This patch better describes the change and the impact on the driver.
CC: John W Linville <linville@tuxdriver.com>
Reported-by: John W Linville <linville@tuxdriver.com>
Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ich8lan.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index 7523f510c7e4..9d81c0317433 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c @@ -603,12 +603,15 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw) u16 i; u32 nvm_size; - /* Can't read flash registers if the register set isn't mapped. */ nvm->type = e1000_nvm_flash_sw; - /* in SPT, gfpreg doesn't exist. NVM size is taken from the - * STRAP register - */ + if (hw->mac.type == e1000_pch_spt) { + /* in SPT, gfpreg doesn't exist. NVM size is taken from the + * STRAP register. This is because in SPT the GbE Flash region + * is no longer accessed through the flash registers. Instead, + * the mechanism has changed, and the Flash region access + * registers are now implemented in GbE memory space. + */ nvm->flash_base_addr = 0; nvm_size = (((er32(STRAP) >> 1) & 0x1F) + 1) * NVM_SIZE_MULTIPLIER; @@ -618,6 +621,7 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw) /* Set the base address for flash register access */ hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR; } else { + /* Can't read flash registers if register set isn't mapped. */ if (!hw->flash_address) { e_dbg("ERROR: Flash registers not mapped\n"); return -E1000_ERR_CONFIG; |