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authorChristopher S. Hall <christopher.s.hall@intel.com>2016-02-22 14:15:26 +0300
committerJohn Stultz <john.stultz@linaro.org>2016-03-04 01:28:46 +0300
commit01d7ada57ee9c735bd71fbe44ec0bcb70847afd4 (patch)
treeee2a3cf1a7d13d36dc87b5eaa736a3652b4f47b0 /drivers/net/ethernet/intel/e1000e/regs.h
parent719f1aa4a67199a3c4c68a03f94e5ec44d9d5f82 (diff)
downloadlinux-01d7ada57ee9c735bd71fbe44ec0bcb70847afd4.tar.xz
e1000e: Adds hardware supported cross timestamp on e1000e nic
Modern Intel systems supports cross timestamping of the network device clock and Always Running Timer (ART) in hardware. This allows the device time and system time to be precisely correlated. The timestamp pair is returned through e1000e_phc_get_syncdevicetime() used by get_system_device_crosststamp(). The hardware cross-timestamp result is made available to applications through the PTP_SYS_OFFSET_PRECISE ioctl which calls e1000e_phc_getcrosststamp(). Cc: Prarit Bhargava <prarit@redhat.com> Cc: Richard Cochran <richardcochran@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@kernel.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Cc: kevin.b.stanton@intel.com Cc: kevin.j.clarke@intel.com Cc: hpa@zytor.com Cc: jeffrey.t.kirsher@intel.com Cc: netdev@vger.kernel.org Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Christopher S. Hall <christopher.s.hall@intel.com> [jstultz: Reworked to use new interface, commit message tweaks] Signed-off-by: John Stultz <john.stultz@linaro.org>
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/regs.h')
-rw-r--r--drivers/net/ethernet/intel/e1000e/regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/regs.h b/drivers/net/ethernet/intel/e1000e/regs.h
index 1d5e0b77062a..0cb4d365e5ad 100644
--- a/drivers/net/ethernet/intel/e1000e/regs.h
+++ b/drivers/net/ethernet/intel/e1000e/regs.h
@@ -245,6 +245,10 @@
#define E1000_SYSTIML 0x0B600 /* System time register Low - RO */
#define E1000_SYSTIMH 0x0B604 /* System time register High - RO */
#define E1000_TIMINCA 0x0B608 /* Increment attributes register - RW */
+#define E1000_SYSSTMPL 0x0B648 /* HH Timesync system stamp low register */
+#define E1000_SYSSTMPH 0x0B64C /* HH Timesync system stamp hi register */
+#define E1000_PLTSTMPL 0x0B640 /* HH Timesync platform stamp low register */
+#define E1000_PLTSTMPH 0x0B644 /* HH Timesync platform stamp hi register */
#define E1000_RXMTRL 0x0B634 /* Time sync Rx EtherType and Msg Type - RW */
#define E1000_RXUDP 0x0B638 /* Time Sync Rx UDP Port - RW */