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authorBruce Allan <bruce.w.allan@intel.com>2013-01-22 12:44:14 +0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-02-05 11:45:47 +0400
commit1b41db37f40dc682ee5d6fb47b3af545c3eabd1f (patch)
tree4fe5dd6daf50786ccad172f9c32b0366da511a87 /drivers/net/ethernet/intel/e1000e/defines.h
parent21b5a6f8ff3cbcd7623187628320a4e7125120fb (diff)
downloadlinux-1b41db37f40dc682ee5d6fb47b3af545c3eabd1f.tar.xz
e1000e: cosmetic move of #defines and prototypes to the new ich8lan.h
Move #defines and function prototypes specific to the ICH/PCH family of devices (ICH8/82562, ICH8/82566, ICH8/82567, ICH9/82562, ICH9/82566, ICH9/82567, ICH10/82567, 82577, 82578, 82579, I217, I218) to the new ich8lan.h header file (the convention for Intel wired ethernet drivers is to use the name of the first device in the family for related file and function names). These defines and function prototypes can be used by other files in the driver and moving them to the ICH/PCH-family-specific file makes it clearer to which devices they are applicable. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/defines.h')
-rw-r--r--drivers/net/ethernet/intel/e1000e/defines.h36
1 files changed, 0 insertions, 36 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
index b425544144ec..fc3a4fe1ac71 100644
--- a/drivers/net/ethernet/intel/e1000e/defines.h
+++ b/drivers/net/ethernet/intel/e1000e/defines.h
@@ -749,38 +749,6 @@
/* BME1000 PHY Specific Control Register */
#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */
-/* PHY Low Power Idle Control */
-#define I82579_LPI_CTRL PHY_REG(772, 20)
-#define I82579_LPI_CTRL_100_ENABLE 0x2000
-#define I82579_LPI_CTRL_1000_ENABLE 0x4000
-#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
-#define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80
-
-/* Extended Management Interface (EMI) Registers */
-#define I82579_EMI_ADDR 0x10
-#define I82579_EMI_DATA 0x11
-#define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */
-#define I82579_MSE_THRESHOLD 0x084F /* 82579 Mean Square Error Threshold */
-#define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */
-#define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */
-#define I82579_EEE_PCS_STATUS 0x182D /* IEEE MMD Register 3.1 >> 8 */
-#define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */
-#define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */
-#define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */
-#define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE supported */
-#define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE supported */
-#define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */
-#define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */
-#define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */
-#define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */
-
-#define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */
-#define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */
-
-#define PHY_PAGE_SHIFT 5
-#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \
- ((reg) & MAX_PHY_REG_ADDRESS))
-
/* Bits...
* 15-5: page
* 4-0: register offset
@@ -827,8 +795,4 @@
/* SerDes Control */
#define E1000_GEN_POLL_TIMEOUT 640
-/* FW Semaphore */
-#define E1000_FWSM_WLOCK_MAC_MASK 0x0380
-#define E1000_FWSM_WLOCK_MAC_SHIFT 7
-
#endif /* _E1000_DEFINES_H_ */