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authorDaode Huang <huangdaode@hisilicon.com>2016-06-21 06:56:39 +0300
committerDavid S. Miller <davem@davemloft.net>2016-06-21 11:51:56 +0300
commit6fe27464d8e1e738c0a4779f6f5423017be052a2 (patch)
treef8bae108d8f1a41909412f532dc6cf0339d8555c /drivers/net/ethernet/hisilicon/hns
parentf28f34cdefe5323468eab79f23d792b014b7d758 (diff)
downloadlinux-6fe27464d8e1e738c0a4779f6f5423017be052a2.tar.xz
net: hns: bug fix about TSO on|off when there is traffic
When enable/disable tso, the driver tries to access the hardware register, but this operation will cause the port unavalible when there is traffic. This patch tries to enable TSO when initialize, then control tso through TSE bit in transmit descriptor. Signed-off-by: Daode Huang <huangdaode@hisilicon.com> Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns')
-rw-r--r--drivers/net/ethernet/hisilicon/hns/hns_enet.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_enet.c b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
index c0ce37b1702c..d5297ecfe4a5 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
@@ -1441,7 +1441,6 @@ static int hns_nic_set_features(struct net_device *netdev,
netdev_features_t features)
{
struct hns_nic_priv *priv = netdev_priv(netdev);
- struct hnae_handle *h = priv->ae_handle;
switch (priv->enet_ver) {
case AE_VERSION_1:
@@ -1454,11 +1453,9 @@ static int hns_nic_set_features(struct net_device *netdev,
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
/* The chip only support 7*4096 */
netif_set_gso_max_size(netdev, 7 * 4096);
- h->dev->ops->set_tso_stats(h, 1);
} else {
priv->ops.fill_desc = fill_v2_desc;
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
- h->dev->ops->set_tso_stats(h, 0);
}
break;
}
@@ -1804,11 +1801,14 @@ static void hns_nic_set_priv_ops(struct net_device *netdev)
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
/* This chip only support 7*4096 */
netif_set_gso_max_size(netdev, 7 * 4096);
- h->dev->ops->set_tso_stats(h, 1);
} else {
priv->ops.fill_desc = fill_v2_desc;
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
}
+ /* enable tso when init
+ * control tso on/off through TSE bit in bd
+ */
+ h->dev->ops->set_tso_stats(h, 1);
}
}