diff options
| author | Hariprasad S <hariprasad@chelsio.com> | 2016-05-06 19:47:56 +0300 |
|---|---|---|
| committer | Doug Ledford <dledford@redhat.com> | 2016-05-14 02:38:05 +0300 |
| commit | 92f850ec3a18d9d8bf2157a8509d435d49ce80b6 (patch) | |
| tree | 9f742f9b0c3f12395b45fd1a1925b59f9211a5ef /drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | |
| parent | ccd2c30b4513905a0624a696ec3eeaa3bf93530d (diff) | |
| download | linux-92f850ec3a18d9d8bf2157a8509d435d49ce80b6.tar.xz | |
RDMA/iw_cxgb4: set the correct FID value in DSGL commands
The FID value in a ULP_MEMIO command needs to be set to an IQ ID of
a queue configured for our PF. The FID/IQ id is used to index into the
PCIE FID table, to find out on which function the DMA needs to be
issued. Essentially, every DMA needs to have the ingress queue. The exact
ingress queue doesn't matter, but it needs to be an ingress queue
associated with the function you want to see the DMA on.
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4_msg.h')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h index 80417fc564d4..4705e2dea423 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h @@ -1392,6 +1392,10 @@ struct ulp_mem_io { #define T5_ULP_MEMIO_ORDER_V(x) ((x) << T5_ULP_MEMIO_ORDER_S) #define T5_ULP_MEMIO_ORDER_F T5_ULP_MEMIO_ORDER_V(1U) +#define T5_ULP_MEMIO_FID_S 4 +#define T5_ULP_MEMIO_FID_M 0x7ff +#define T5_ULP_MEMIO_FID_V(x) ((x) << T5_ULP_MEMIO_FID_S) + /* ulp_mem_io.lock_addr fields */ #define ULP_MEMIO_ADDR_S 0 #define ULP_MEMIO_ADDR_V(x) ((x) << ULP_MEMIO_ADDR_S) |