diff options
| author | Yaniv Rosner <yanivr@broadcom.com> | 2013-03-11 09:17:50 +0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-03-12 15:54:25 +0400 |
| commit | e438c5d651e2a7b7d6d1bad23cc3a878392e6a5c (patch) | |
| tree | 75f1a6b002e29cb4e7e8e2bb898216034ceeccd7 /drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h | |
| parent | 31b958d755d1d124ce3a0fbc998434fe9c0ab88b (diff) | |
| download | linux-e438c5d651e2a7b7d6d1bad23cc3a878392e6a5c.tar.xz | |
bnx2x: Control SFP+ tap values via nvm config
Configure SFP+ tap values to optimize link signal according to NVRAM setup.
Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h')
| -rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h index 037860ecc343..a7a3504e1bd5 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h @@ -508,7 +508,22 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */ #define PORT_HW_CFG_PAUSE_ON_HOST_RING_DISABLED 0x00000000 #define PORT_HW_CFG_PAUSE_ON_HOST_RING_ENABLED 0x00000001 - u32 reserved0[6]; /* 0x178 */ + /* SFP+ Tx Equalization: NIC recommended and tested value is 0xBEB2 + * LOM recommended and tested value is 0xBEB2. Using a different + * value means using a value not tested by BRCM + */ + u32 sfi_tap_values; /* 0x178 */ + #define PORT_HW_CFG_TX_EQUALIZATION_MASK 0x0000FFFF + #define PORT_HW_CFG_TX_EQUALIZATION_SHIFT 0 + + /* SFP+ Tx driver broadcast IDRIVER: NIC recommended and tested + * value is 0x2. LOM recommended and tested value is 0x2. Using a + * different value means using a value not tested by BRCM + */ + #define PORT_HW_CFG_TX_DRV_BROADCAST_MASK 0x000F0000 + #define PORT_HW_CFG_TX_DRV_BROADCAST_SHIFT 16 + + u32 reserved0[5]; /* 0x17c */ u32 aeu_int_mask; /* 0x190 */ |