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authorHuang, Xiong <xiong@qca.qualcomm.com>2012-04-26 00:27:12 +0400
committerDavid S. Miller <davem@davemloft.net>2012-04-26 13:03:32 +0400
commit7737fd96450236accb4856916366240a96de97be (patch)
tree82cac7341900cbba2dbed1fc488de56a2346d27b /drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
parentce3ba0c995c194bb922fd449d72a5d006c702aec (diff)
downloadlinux-7737fd96450236accb4856916366240a96de97be.tar.xz
atl1c: refine SERDES-clock related code
bit 17/18 of reg1424 must be clear for l2cb 1.x, or it will cause the write-reg operation fail without cable connected. so, please do connect the cable when apply this patch to the driver to make sure these 2bits are cleared by new driver. The revised code is move to al1c_reset_mac. SERDES register definition is refined as well. when do reset MAC, speed/duplex control right should be transferred to software before do PHY auto-neg -- by bit MASTER_CTRL_SPEED_MODE_SW. SERDES register definition is refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c')
-rw-r--r--drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c b/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
index 3feb846d40e4..859ea844ba0f 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
@@ -153,7 +153,7 @@ static void atl1c_get_regs(struct net_device *netdev,
AT_READ_REG(hw, REG_LINK_CTRL, p++);
AT_READ_REG(hw, REG_IDLE_STATUS, p++);
AT_READ_REG(hw, REG_MDIO_CTRL, p++);
- AT_READ_REG(hw, REG_SERDES_LOCK, p++);
+ AT_READ_REG(hw, REG_SERDES, p++);
AT_READ_REG(hw, REG_MAC_CTRL, p++);
AT_READ_REG(hw, REG_MAC_IPG_IFG, p++);
AT_READ_REG(hw, REG_MAC_STA_ADDR, p++);