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authorJesse Brandeburg <jesse.brandeburg@intel.com>2006-11-01 19:47:42 +0300
committerJeff Garzik <jeff@garzik.org>2006-12-02 08:11:59 +0300
commit2ce9047f5d8464039da8ff986e71be5546e229c0 (patch)
tree4e888a376bb97c9688d8ebb70d1ffef144b5529f /drivers/net/e1000/e1000_hw.c
parent21c4d5e07859a6fc0f62be37da15b161e142c8d1 (diff)
downloadlinux-2ce9047f5d8464039da8ff986e71be5546e229c0.tar.xz
e1000: add mmiowb() for IA64 to sync tail writes
IA64 SMP systems were seeing TX issues with multiple cpu's attempting to write tail registers unordered. This mmiowb() fixes the issue. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
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