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author | Andrew Lunn <andrew@lunn.ch> | 2021-09-26 20:41:26 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2021-09-27 15:31:10 +0300 |
commit | b9c587fed61cf88bd45822c3159644445f6d5aa6 (patch) | |
tree | 91ef25b82a747d4b543315412100a150169b6844 /drivers/net/dsa/mv88e6xxx/chip.h | |
parent | b92ce2f54c0f0ff781e914ec189c25f7bf1b1ec2 (diff) | |
download | linux-b9c587fed61cf88bd45822c3159644445f6d5aa6.tar.xz |
dsa: mv88e6xxx: Include tagger overhead when setting MTU for DSA and CPU ports
Same members of the Marvell Ethernet switches impose MTU restrictions
on ports used for connecting to the CPU or another switch for DSA. If
the MTU is set too low, tagged frames will be discarded. Ensure the
worst case tagger overhead is included in setting the MTU for DSA and
CPU ports.
Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")
Reported by: 曹煜 <cao88yu@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/chip.h')
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 675b1f3e43b7..59f316cc8583 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -18,6 +18,7 @@ #include <linux/timecounter.h> #include <net/dsa.h> +#define EDSA_HLEN 8 #define MV88E6XXX_N_FID 4096 /* PVT limits for 4-bit port and 5-bit switch */ |