diff options
| author | Vladislav Zolotarov <vladz@broadcom.com> | 2010-04-19 05:13:12 +0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-04-20 00:17:05 +0400 |
| commit | 72fd0718332e6514fb9db325e89ffc694bb31f6e (patch) | |
| tree | 944305857677a520b4ac33732feb139b52c8af29 /drivers/net/bnx2x.h | |
| parent | fc6055a5ba31e2c14e36e8939f9bf2b6d586a7f5 (diff) | |
| download | linux-72fd0718332e6514fb9db325e89ffc694bb31f6e.tar.xz | |
bnx2x: Parity errors handling for 57710 and 57711
This patch introduces the parity errors handling code for 57710 and 57711 chips.
HW is configured to stop all DMA transactions to the host and sending packets to the network
once parity error is detected, which is meant to prevent silent data corruption.
At the same time HW generates the attention interrupt to every function of the device where parity
has been detected so that driver can start the recovery flow.
The recovery is actually resetting the chip and restarting the driver on all active functions
of the chip where the parity error has been reported.
Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x.h')
| -rw-r--r-- | drivers/net/bnx2x.h | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h index ae9c89ebcc8b..ccef13b41dfa 100644 --- a/drivers/net/bnx2x.h +++ b/drivers/net/bnx2x.h @@ -155,9 +155,15 @@ do { \ #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field)) #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) +#define MF_CFG_RD(bp, field) SHMEM_RD(bp, mf_cfg.field) +#define MF_CFG_WR(bp, field, val) SHMEM_WR(bp, mf_cfg.field, val) + #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val) +#define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \ + AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR + /* fast path */ @@ -818,6 +824,12 @@ struct attn_route { u32 sig[4]; }; +typedef enum { + BNX2X_RECOVERY_DONE, + BNX2X_RECOVERY_INIT, + BNX2X_RECOVERY_WAIT, +} bnx2x_recovery_state_t; + struct bnx2x { /* Fields used in the tx and intr/napi performance paths * are grouped together in the beginning of the structure @@ -835,6 +847,9 @@ struct bnx2x { struct pci_dev *pdev; atomic_t intr_sem; + + bnx2x_recovery_state_t recovery_state; + int is_leader; #ifdef BCM_CNIC struct msix_entry msix_table[MAX_CONTEXT+2]; #else @@ -924,8 +939,7 @@ struct bnx2x { int mrrs; struct delayed_work sp_task; - struct work_struct reset_task; - + struct delayed_work reset_task; struct timer_list timer; int current_interval; @@ -1125,6 +1139,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define LOAD_DIAG 2 #define UNLOAD_NORMAL 0 #define UNLOAD_CLOSE 1 +#define UNLOAD_RECOVERY 2 /* DMAE command defines */ @@ -1294,6 +1309,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR) +#define HW_PRTY_ASSERT_SET_3 (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) #define MULTI_FLAGS(bp) \ (TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | \ |