diff options
author | Ben Dooks <ben@fluff.org> | 2007-07-03 19:53:09 +0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-07-10 20:41:08 +0400 |
commit | 825a2ff1896ec3ead94bebef60c71f57254da58a (patch) | |
tree | cc88b2a7666df7377819e8265298f974e388294e /drivers/net/8390.h | |
parent | f49343a54864b98333b98706accba66aa75a0c16 (diff) | |
download | linux-825a2ff1896ec3ead94bebef60c71f57254da58a.tar.xz |
AX88796 network driver
Support for the Asix AX88796 network controller, an
NE2000 compatible 10/100 ethernet device with internal
PHY.
The driver supports PHY settings via either ioctl() or
the ethtool driver ops.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/8390.h')
-rw-r--r-- | drivers/net/8390.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/8390.h b/drivers/net/8390.h index 414de5bd228f..04ddec0f4c61 100644 --- a/drivers/net/8390.h +++ b/drivers/net/8390.h @@ -73,6 +73,9 @@ struct ei_device { u32 *reg_offset; /* Register mapping table */ spinlock_t page_lock; /* Page register locks */ unsigned long priv; /* Private field to store bus IDs etc. */ +#ifdef AX88796_PLATFORM + unsigned char rxcr_base; /* default value for RXCR */ +#endif }; /* The maximum number of 8390 interrupt service routines called per IRQ. */ @@ -86,11 +89,19 @@ struct ei_device { /* Some generic ethernet register configurations. */ #define E8390_TX_IRQ_MASK 0xa /* For register EN0_ISR */ #define E8390_RX_IRQ_MASK 0x5 + +#ifdef AX88796_PLATFORM +#define E8390_RXCONFIG (ei_status.rxcr_base | 0x04) +#define E8390_RXOFF (ei_status.rxcr_base | 0x20) +#else #define E8390_RXCONFIG 0x4 /* EN0_RXCR: broadcasts, no multicast,errors */ #define E8390_RXOFF 0x20 /* EN0_RXCR: Accept no packets */ +#endif + #define E8390_TXCONFIG 0x00 /* EN0_TXCR: Normal transmit mode */ #define E8390_TXOFF 0x02 /* EN0_TXCR: Transmitter off */ + /* Register accessed at EN_CMD, the 8390 base addr. */ #define E8390_STOP 0x01 /* Stop and reset the chip */ #define E8390_START 0x02 /* Start the chip, clear reset */ |