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authorArvind Yadav <arvind.yadav.cs@gmail.com>2017-08-01 14:38:06 +0300
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-08-23 17:49:19 +0300
commit7c94128127ba6ecbaa1e2085088c7337a99aaf51 (patch)
treece863796241f2df99be8eaebd78b7459b3b29ed3 /drivers/mtd/nand
parent24c9cd8f8d26194aa1a4077c62df90d657766235 (diff)
downloadlinux-7c94128127ba6ecbaa1e2085088c7337a99aaf51.tar.xz
mtd: nand: lpc32xx_slc: Handle return value of clk_prepare_enable.
clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/lpc32xx_slc.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/mtd/nand/lpc32xx_slc.c b/drivers/mtd/nand/lpc32xx_slc.c
index a0669a33f8fe..80c282914586 100644
--- a/drivers/mtd/nand/lpc32xx_slc.c
+++ b/drivers/mtd/nand/lpc32xx_slc.c
@@ -840,7 +840,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
res = -ENOENT;
goto err_exit1;
}
- clk_prepare_enable(host->clk);
+ res = clk_prepare_enable(host->clk);
+ if (res)
+ goto err_exit1;
/* Set NAND IO addresses and command/ready functions */
chip->IO_ADDR_R = SLC_DATA(host->io_base);
@@ -972,9 +974,12 @@ static int lpc32xx_nand_remove(struct platform_device *pdev)
static int lpc32xx_nand_resume(struct platform_device *pdev)
{
struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
+ int ret;
/* Re-enable NAND clock */
- clk_prepare_enable(host->clk);
+ ret = clk_prepare_enable(host->clk);
+ if (ret)
+ return ret;
/* Fresh init of NAND controller */
lpc32xx_nand_setup(host);