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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-05-24 21:00:20 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-05-24 21:00:20 +0300 |
commit | 8bc4d5f394a3facbad6af2f18940f1db3b1a0844 (patch) | |
tree | 14838a236e87126d4b84d22b9049b9a6f0be878f /drivers/mtd/nand/pasemi_nand.c | |
parent | 29567292c0b5b2fb484125c280a2175141fe2205 (diff) | |
parent | e5366a266a8cd4cd6b0fe66876462cca2e1c6a89 (diff) | |
download | linux-8bc4d5f394a3facbad6af2f18940f1db3b1a0844.tar.xz |
Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"First cycle with Boris as NAND maintainer! Many (most) bullets stolen
from him.
Generic:
- Migrated NAND LED trigger to be a generic MTD trigger
NAND:
- Introduction of the "ECC algorithm" concept, to avoid overloading
the ECC mode field too much more
- Replaced the nand_ecclayout infrastructure with something a little
more flexible (finally!) and future proof
- Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some
of this into their own tree as well
- Prepare the sunxi NAND driver to receive DMA support
- Handle bitflips in erased pages on GPMI revisions that do not
support this in hardware.
SPI NOR:
- Start using the spi_flash_read() API for SPI drivers that support
it (i.e., SPI drivers with special memory-mapped flash modes)
And other small scattered improvments"
* tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits)
mtd: spi-nor: support GigaDevice gd25lq64c
mtd: nand_bch: fix spelling of "probably"
mtd: brcmnand: respect ECC algorithm set by NAND subsystem
gpmi-nand: Handle ECC Errors in erased pages
Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value
mtd: nand: add support for "nand-ecc-algo" DT property
mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping
mtd: nand: read ECC algorithm from the new field
mtd: nand: fsmc: validate ECC setup by checking algorithm directly
mtd: nand: set ECC algorithm to Hamming on fallback
staging: mt29f_spinand: set ECC algorithm explicitly
CRIS v32: nand: set ECC algorithm explicitly
mtd: nand: atmel: set ECC algorithm explicitly
mtd: nand: davinci: set ECC algorithm explicitly
mtd: nand: bf5xx: set ECC algorithm explicitly
mtd: nand: omap2: Fix high memory dma prefetch transfer
mtd: nand: omap2: Start dma request before enabling prefetch
mtd: nandsim: add __init attribute
mtd: nand: move of_get_nand_xxx() helpers into nand_base.c
...
Diffstat (limited to 'drivers/mtd/nand/pasemi_nand.c')
-rw-r--r-- | drivers/mtd/nand/pasemi_nand.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c index 3ab53ca53cca..5de7591b0510 100644 --- a/drivers/mtd/nand/pasemi_nand.c +++ b/drivers/mtd/nand/pasemi_nand.c @@ -92,8 +92,9 @@ int pasemi_device_ready(struct mtd_info *mtd) static int pasemi_nand_probe(struct platform_device *ofdev) { + struct device *dev = &ofdev->dev; struct pci_dev *pdev; - struct device_node *np = ofdev->dev.of_node; + struct device_node *np = dev->of_node; struct resource res; struct nand_chip *chip; int err = 0; @@ -107,13 +108,11 @@ static int pasemi_nand_probe(struct platform_device *ofdev) if (pasemi_nand_mtd) return -ENODEV; - pr_debug("pasemi_nand at %pR\n", &res); + dev_dbg(dev, "pasemi_nand at %pR\n", &res); /* Allocate memory for MTD device structure and private data */ chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL); if (!chip) { - printk(KERN_WARNING - "Unable to allocate PASEMI NAND MTD device structure\n"); err = -ENOMEM; goto out; } @@ -121,7 +120,7 @@ static int pasemi_nand_probe(struct platform_device *ofdev) pasemi_nand_mtd = nand_to_mtd(chip); /* Link the private data with the MTD structure */ - pasemi_nand_mtd->dev.parent = &ofdev->dev; + pasemi_nand_mtd->dev.parent = dev; chip->IO_ADDR_R = of_iomap(np, 0); chip->IO_ADDR_W = chip->IO_ADDR_R; @@ -151,6 +150,7 @@ static int pasemi_nand_probe(struct platform_device *ofdev) chip->write_buf = pasemi_write_buf; chip->chip_delay = 0; chip->ecc.mode = NAND_ECC_SOFT; + chip->ecc.algo = NAND_ECC_HAMMING; /* Enable the following for a flash based bad block table */ chip->bbt_options = NAND_BBT_USE_FLASH; @@ -162,13 +162,13 @@ static int pasemi_nand_probe(struct platform_device *ofdev) } if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) { - printk(KERN_ERR "pasemi_nand: Unable to register MTD device\n"); + dev_err(dev, "Unable to register MTD device\n"); err = -ENODEV; goto out_lpc; } - printk(KERN_INFO "PA Semi NAND flash at %08llx, control at I/O %x\n", - res.start, lpcctl); + dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res, + lpcctl); return 0; |