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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-09-22 06:46:48 +0300 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-09-22 10:04:38 +0300 |
| commit | 29c4dd928735d5668b3108d350c30be7d0dc68fb (patch) | |
| tree | 353d1201d74855365fe512646a67c069e870db5b /drivers/mtd/nand/denali.h | |
| parent | c70b5eb20a5dd9b3e4f68e041ad7526c94a2945e (diff) | |
| download | linux-29c4dd928735d5668b3108d350c30be7d0dc68fb.tar.xz | |
mtd: nand: denali: support direct addressing mode
The Denali NAND IP core decodes the lower 28 bits of the slave address
to get the control information; bit[27:26]=mode, bit[25:24]=bank, etc.
This means 256MB address range must be allocated for this IP. (Direct
Addressing)
For systems with address space limitation, the Denali IP provides an
optional module that translates the addressing - address and data are
latched by the registers in the translation module. (Indexed Addressing)
The addressing mode can be selected when the delivered RTL is configured,
and it can be read out from the FEATURES register.
Most of SoC vendors would choose Indexed Addressing to save the address
space, but Direct Addressing is possible as well, and it can be easily
supported by adding ->host_{read,write} hooks.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand/denali.h')
| -rw-r--r-- | drivers/mtd/nand/denali.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index f55ee10724c2..3aeb272d7a07 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -319,6 +319,8 @@ struct denali_nand_info { unsigned int revision; /* IP revision */ unsigned int caps; /* IP capability (or quirk) */ const struct nand_ecc_caps *ecc_caps; + u32 (*host_read)(struct denali_nand_info *denali, u32 addr); + void (*host_write)(struct denali_nand_info *denali, u32 addr, u32 data); }; #define DENALI_CAP_HW_ECC_FIXUP BIT(0) |