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author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 22:11:56 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 22:11:56 +0300 |
commit | 0fc7e74663447682c904fe375bb680b004ddaa14 (patch) | |
tree | 95f89c4a207995e57354c4f44bf7d83b5536370c /drivers/mtd/nand/brcmnand/brcmnand.c | |
parent | aa5e75bc7a7c4ecbdee7bc85d1a306041b926e24 (diff) | |
parent | 571cb17b23eccc22f18c4fc0a0fc34cf0abca7ef (diff) | |
download | linux-0fc7e74663447682c904fe375bb680b004ddaa14.tar.xz |
Merge tag 'mtd/for-4.16' of git://git.infradead.org/linux-mtd
Pull MTD updates from Boris Brezillon:
"MTD core changes:
- Rework core functions to avoid duplicating generic checks in
NAND/OneNAND sub-layers
- Update the MAINTAINERS entry to reflect the fact that MTD
maintainers now use a single git tree
MTD driver changes:
- CFI: use macros instead of inline functions to limit stack usage
and make KASAN happy
NAND core changes:
- Fix NAND_CMD_NONE handling in nand_command[_lp]() hooks
- Introduce the ->exec_op() infrastructure
- Rework NAND buffers handling
- Fix ECC requirements for K9F4G08U0D
- Fix nand_do_read_oob() to return the number of bitflips
- Mark K9F1G08U0E as not supporting subpage writes
NAND driver changes:
- MTK: Rework the driver to support new IP versions
- OMAP OneNAND: Full rework to use new APIs (libgpio, dmaengine) and
fix DT support
- Marvell: Add a new driver to replace the pxa3xx one
SPI NOR core changes:
- Add support to new ISSI and Cypress/Spansion memory parts.
- Fix support of Micron memories by checking error bits in the FSR.
- Fix update of block-protection bits by reading back the SR.
- Restore the internal state of the SPI flash memory when removing
the device.
SPI NOR driver changes:
- Maintenance for Freescale, Intel and Metiatek drivers.
- Add support of the direct access mode for the Cadence QSPI
controller"
* tag 'mtd/for-4.16' of git://git.infradead.org/linux-mtd: (93 commits)
mtd: nand: sunxi: Fix ECC strength choice
mtd: nand: gpmi: Fix subpage reads
mtd: nand: Fix build issues due to an anonymous union
mtd: nand: marvell: Fix missing memory allocation modifier
mtd: nand: marvell: remove redundant variable 'oob_len'
mtd: nand: marvell: fix spelling mistake: "suceed"-> "succeed"
mtd: onenand: omap2: Remove redundant dev_err call in omap2_onenand_probe()
mtd: Remove duplicate checks on mtd_oob_ops parameter
mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
mtd: mtdpart: Make ECC stat handling consistent
mtd: onenand: omap2: print resource using %pR format string
mtd: mtk-nor: modify functions' name more generally
mtd: onenand: samsung: remove incorrect __iomem annotation
MAINTAINERS: Add entry for Marvell NAND controller driver
ARM: OMAP2+: Remove gpmc-onenand
mtd: onenand: omap2: Configure driver from DT
mtd: onenand: omap2: Decouple DMA enabling from INT pin availability
mtd: onenand: omap2: Do not make delay for GPIO OMAP3 specific
mtd: onenand: omap2: Convert to use dmaengine for memcpy
mtd: onenand: omap2: Unify OMAP2 and OMAP3 DMA implementation
...
Diffstat (limited to 'drivers/mtd/nand/brcmnand/brcmnand.c')
-rw-r--r-- | drivers/mtd/nand/brcmnand/brcmnand.c | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c index dd56a671ea42..c28fd2bc1a84 100644 --- a/drivers/mtd/nand/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/brcmnand/brcmnand.c @@ -1071,7 +1071,7 @@ static void brcmnand_wp(struct mtd_info *mtd, int wp) return; brcmnand_set_wp(ctrl, wp); - chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + nand_status_op(chip, NULL); /* NAND_STATUS_WP 0x00 = protected, 0x80 = not protected */ ret = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY | @@ -1453,7 +1453,7 @@ static uint8_t brcmnand_read_byte(struct mtd_info *mtd) /* At FC_BYTES boundary, switch to next column */ if (host->last_byte > 0 && offs == 0) - chip->cmdfunc(mtd, NAND_CMD_RNDOUT, addr, -1); + nand_change_read_column_op(chip, addr, NULL, 0, false); ret = ctrl->flash_cache[offs]; break; @@ -1681,7 +1681,7 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, int ret; if (!buf) { - buf = chip->buffers->databuf; + buf = chip->data_buf; /* Invalidate page cache */ chip->pagebuf = -1; } @@ -1689,7 +1689,6 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, sas = mtd->oobsize / chip->ecc.steps; /* read without ecc for verification */ - chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); ret = chip->ecc.read_page_raw(mtd, chip, buf, true, page); if (ret) return ret; @@ -1793,6 +1792,8 @@ static int brcmnand_read_page(struct mtd_info *mtd, struct nand_chip *chip, struct brcmnand_host *host = nand_get_controller_data(chip); u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL; + nand_read_page_op(chip, page, 0, NULL, 0); + return brcmnand_read(mtd, chip, host->last_addr, mtd->writesize >> FC_SHIFT, (u32 *)buf, oob); } @@ -1804,6 +1805,8 @@ static int brcmnand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL; int ret; + nand_read_page_op(chip, page, 0, NULL, 0); + brcmnand_set_ecc_enabled(host, 0); ret = brcmnand_read(mtd, chip, host->last_addr, mtd->writesize >> FC_SHIFT, (u32 *)buf, oob); @@ -1909,8 +1912,10 @@ static int brcmnand_write_page(struct mtd_info *mtd, struct nand_chip *chip, struct brcmnand_host *host = nand_get_controller_data(chip); void *oob = oob_required ? chip->oob_poi : NULL; + nand_prog_page_begin_op(chip, page, 0, NULL, 0); brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob); - return 0; + + return nand_prog_page_end_op(chip); } static int brcmnand_write_page_raw(struct mtd_info *mtd, @@ -1920,10 +1925,12 @@ static int brcmnand_write_page_raw(struct mtd_info *mtd, struct brcmnand_host *host = nand_get_controller_data(chip); void *oob = oob_required ? chip->oob_poi : NULL; + nand_prog_page_begin_op(chip, page, 0, NULL, 0); brcmnand_set_ecc_enabled(host, 0); brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob); brcmnand_set_ecc_enabled(host, 1); - return 0; + + return nand_prog_page_end_op(chip); } static int brcmnand_write_oob(struct mtd_info *mtd, struct nand_chip *chip, @@ -2193,16 +2200,9 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) if (ctrl->nand_version >= 0x0702) tmp |= ACC_CONTROL_RD_ERASED; tmp &= ~ACC_CONTROL_FAST_PGM_RDIN; - if (ctrl->features & BRCMNAND_HAS_PREFETCH) { - /* - * FIXME: Flash DMA + prefetch may see spurious erased-page ECC - * errors - */ - if (has_flash_dma(ctrl)) - tmp &= ~ACC_CONTROL_PREFETCH; - else - tmp |= ACC_CONTROL_PREFETCH; - } + if (ctrl->features & BRCMNAND_HAS_PREFETCH) + tmp &= ~ACC_CONTROL_PREFETCH; + nand_writereg(ctrl, offs, tmp); return 0; @@ -2230,6 +2230,9 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) nand_set_controller_data(chip, host); mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d", host->cs); + if (!mtd->name) + return -ENOMEM; + mtd->owner = THIS_MODULE; mtd->dev.parent = &pdev->dev; @@ -2369,12 +2372,11 @@ static int brcmnand_resume(struct device *dev) list_for_each_entry(host, &ctrl->host_list, node) { struct nand_chip *chip = &host->chip; - struct mtd_info *mtd = nand_to_mtd(chip); brcmnand_save_restore_cs_config(host, 1); /* Reset the chip, required by some chips after power-up */ - chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + nand_reset_op(chip); } return 0; |