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authorHerve Codina <Herve.CODINA@celad.com>2014-03-03 15:15:29 +0400
committerBrian Norris <computersforpeace@gmail.com>2014-03-11 09:42:31 +0400
commit90445ff6241e2a13445310803e2efa606c61f276 (patch)
treed0e70dc214f4a9f4651324d90090449a5025b44b /drivers/mtd/nand/atmel_nand.c
parentb8e2931d168724ca95d275f4f825636bff82a9e8 (diff)
downloadlinux-90445ff6241e2a13445310803e2efa606c61f276.tar.xz
mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECC
Crash detected on sam5d35 and its pmecc nand ecc controller. The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page. chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page. Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Acked-by: Josh Wu <josh.wu@atmel.com> Cc: stable@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand/atmel_nand.c')
-rw-r--r--drivers/mtd/nand/atmel_nand.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 1f719e03c073..4ce181a35bcd 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
goto err;
}
+ nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;