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authorCristian Birsan <cristian.birsan@microchip.com>2020-03-12 17:29:24 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2020-03-24 16:39:53 +0300
commitfdd8eef4be53fcb4f50dbe4c6ee7a334a395f9ee (patch)
treea66c7df7ae5d066e58e39c94a3ed1014f5d01686 /drivers/mmc
parentf87391eec2c5f54269e64d655da19f2c32515e4c (diff)
downloadlinux-fdd8eef4be53fcb4f50dbe4c6ee7a334a395f9ee.tar.xz
mmc: sdhci-of-at91: Display clock changes for debug purpose only
The sdhci_at91_set_clks_presets() function is called multiple times at runtime and the messages are shown on the console. Display clk mul, gck rate and clk base for debug purpose only. Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200312142904.232822-1-tudor.ambarus@microchip.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-of-at91.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c
index e36db6c6618e..c79bff5e2280 100644
--- a/drivers/mmc/host/sdhci-of-at91.c
+++ b/drivers/mmc/host/sdhci-of-at91.c
@@ -189,8 +189,8 @@ static int sdhci_at91_set_clks_presets(struct device *dev)
/* Set capabilities in ro mode. */
writel(0, host->ioaddr + SDMMC_CACR);
- dev_info(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n",
- clk_mul, gck_rate, clk_base_rate);
+ dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n",
+ clk_mul, gck_rate, clk_base_rate);
/*
* We have to set preset values because it depends on the clk_mul