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authorTony Lindgren <tony@atomide.com>2006-06-27 03:16:15 +0400
committerTony Lindgren <tony@atomide.com>2006-06-27 03:16:15 +0400
commit7ff879dbcd2083c95933a56bce65ae45ecab3f35 (patch)
treeba34240578d5d8cebf58ad9e5f23d22d3eed2d5a /drivers/mmc
parent6dc3c8f20159530d5553d0f8decc9454916d7495 (diff)
downloadlinux-7ff879dbcd2083c95933a56bce65ae45ecab3f35.tar.xz
ARM: OMAP: Fix DMA channel irq handling for omap24xx
- DMA CSR register is cleared by reading on omap1, but on omap2 it is cleard by writing to it. - DMA TOUT interrupt does not exist on omap24xx, rename it - Add SECURE and MISALIGNED errors by default for omap24xx - Add defines for external DMA request lines Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/omap.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
index c25244b3657b..4aa1e56235c9 100644
--- a/drivers/mmc/omap.c
+++ b/drivers/mmc/omap.c
@@ -663,7 +663,7 @@ static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
return;
}
/* FIXME: We really should do something to _handle_ the errors */
- if (ch_status & OMAP_DMA_TOUT_IRQ) {
+ if (ch_status & OMAP1_DMA_TOUT_IRQ) {
dev_err(mmc_dev(host->mmc),"DMA timeout\n");
return;
}