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authorAnton Vorontsov <avorontsov@ru.mvista.com>2010-05-27 01:41:53 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-27 20:12:39 +0400
commitf27f47ef5b67106ff1cdeebf061387a7b30c12bc (patch)
tree0238bc989cefa0df4e64eaa3c21c182c66c294c4 /drivers/mmc
parent0e950fa686d53a57ee6c47f477ecfc681670c6a9 (diff)
downloadlinux-f27f47ef5b67106ff1cdeebf061387a7b30c12bc.tar.xz
sdhci: implement CAP_CLOCK_BASE_BROKEN quirk
Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in CLOCK_BASE capability field, and currently there is no way to force the SDHCI core to use the platform-provided base clock value. This patch implements CAP_CLOCK_BASE_BROKEN quirk. When enabled, the SDHCI core will always use base clock frequency provided by the platform. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Richard Röjfors <richard.rojfors@pelagicore.com> Cc: David Vrabel <david.vrabel@csr.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Ben Dooks <ben@simtec.co.uk> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci.c3
-rw-r--r--drivers/mmc/host/sdhci.h2
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 9d4fdfa685e5..02b365f5a4be 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1744,7 +1744,8 @@ int sdhci_add_host(struct sdhci_host *host)
host->max_clk =
(caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
host->max_clk *= 1000000;
- if (host->max_clk == 0) {
+ if (host->max_clk == 0 || host->quirks &
+ SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) {
if (!host->ops->get_max_clock) {
printk(KERN_ERR
"%s: Hardware doesn't specify base clock "
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 842f46f94284..831bf7f137f6 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -236,6 +236,8 @@ struct sdhci_host {
#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
/* Controller uses SDCLK instead of TMCLK for data timeouts */
#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24)
+/* Controller reports wrong base clock capability */
+#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25)
int irq; /* Device IRQ */
void __iomem * ioaddr; /* Mapped address */