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author | Prabu Thangamuthu <Prabu.T@synopsys.com> | 2015-05-28 15:21:06 +0300 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-06-12 10:31:01 +0300 |
commit | 048fd7e665cef45630102dc8bf81971fbc82e52c (patch) | |
tree | 223c1925b70c5d5610285f8852db60a31f6a388c /drivers/mmc | |
parent | 5fd26c7ecb32082745b0bd33c8e35badd1cb5a91 (diff) | |
download | linux-048fd7e665cef45630102dc8bf81971fbc82e52c.tar.xz |
mmc: dw_mmc: insmod followed by rmmod will hung for eMMC
Remove module of dw_mmc driver will hung for eMMC devices if we follow the
steps which are listed below,
insmod dw_mmc.ko
insmod dw_mmc-pci.ko
rmmod dw_mmc-pci.ko
The root cause for this issue is, dw_mci_remove() will disable all the
interrupts by programming 0x0 to INTMASK register then it will call
dw_mci_cleanup_slot(). But dw_mci_cleanup_slot() is issuing CMD6 to
disable the eMMC boot partition and it is waiting for Command Complete
interrupt. Since INTMASK was already cleared by dw_mci_remove(), Command
Complete interrupt is not reaching the system. This leads to process hung.
Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/host/dw_mmc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 55179f1001fb..40e9d8e45f25 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -2926,15 +2926,15 @@ void dw_mci_remove(struct dw_mci *host) { int i; - mci_writel(host, RINTSTS, 0xFFFFFFFF); - mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ - for (i = 0; i < host->num_slots; i++) { dev_dbg(host->dev, "remove slot %d\n", i); if (host->slot[i]) dw_mci_cleanup_slot(host->slot[i], i); } + mci_writel(host, RINTSTS, 0xFFFFFFFF); + mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ + /* disable clock to CIU */ mci_writel(host, CLKENA, 0); mci_writel(host, CLKSRC, 0); |