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authorJean-Francois Moine <moinejf@free.fr>2016-08-23 11:51:04 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2016-09-26 22:31:12 +0300
commit63311bece02abad40ae442e6deba2a2e522949fb (patch)
tree368bf6c345faf643ddf6c6863ef81a20df6c066d /drivers/mmc/host/sunxi-mmc.c
parentb2db9c6743f2622f279af3a022a47a08e6e6f2c9 (diff)
downloadlinux-63311bece02abad40ae442e6deba2a2e522949fb.tar.xz
mmc: sunxi: Check the value returned by clk_round_rate
clk_round_rate() may return an error. Check it. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sunxi-mmc.c')
-rw-r--r--drivers/mmc/host/sunxi-mmc.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 2ec91ce1fb0a..142ab3ff579c 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -692,7 +692,8 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host,
static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
struct mmc_ios *ios)
{
- u32 rate, rval, clock = ios->clock;
+ long rate;
+ u32 rval, clock = ios->clock;
int ret;
/* 8 bit DDR requires a higher module clock */
@@ -701,13 +702,18 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
clock <<= 1;
rate = clk_round_rate(host->clk_mmc, clock);
- dev_dbg(mmc_dev(host->mmc), "setting clk to %d, rounded %d\n",
+ if (rate < 0) {
+ dev_err(mmc_dev(host->mmc), "error rounding clk to %d: %ld\n",
+ clock, rate);
+ return rate;
+ }
+ dev_dbg(mmc_dev(host->mmc), "setting clk to %d, rounded %ld\n",
clock, rate);
/* setting clock rate */
ret = clk_set_rate(host->clk_mmc, rate);
if (ret) {
- dev_err(mmc_dev(host->mmc), "error setting clk to %d: %d\n",
+ dev_err(mmc_dev(host->mmc), "error setting clk to %ld: %d\n",
rate, ret);
return ret;
}