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| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-10-02 17:58:52 +0300 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-10-04 11:50:36 +0300 |
| commit | bb16ea1742c8f35a9349b7508dc45d3a922db5f5 (patch) | |
| tree | 87416834df3b15a64f7d7a9d7d53878cac7602cb /drivers/mmc/host/sdhci-xenon.h | |
| parent | 0a44697627d17a66d7dc98f17aeca07ca79c5c20 (diff) | |
| download | linux-bb16ea1742c8f35a9349b7508dc45d3a922db5f5.tar.xz | |
mmc: sdhci-xenon: Fix clock resource by adding an optional bus clock
On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock
is optional because not all the SoCs need them but at least for Armada
7K/8K it is actually mandatory.
The binding documentation is updating accordingly.
Without this patch the kernel hand during boot if the mvpp2.2 network
driver was not present in the kernel. Indeed the clock needed by the
xenon controller was set by the network driver.
Fixes: 3a3748dba881 ("mmc: sdhci-xenon: Add Marvell Xenon SDHC core
functionality)"
CC: Stable <stable@vger.kernel.org>
Tested-by: Zhoujie Wu <zjwu@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-xenon.h')
| -rw-r--r-- | drivers/mmc/host/sdhci-xenon.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-xenon.h b/drivers/mmc/host/sdhci-xenon.h index 2bc0510c0769..9994995c7c56 100644 --- a/drivers/mmc/host/sdhci-xenon.h +++ b/drivers/mmc/host/sdhci-xenon.h @@ -83,6 +83,7 @@ struct xenon_priv { unsigned char bus_width; unsigned char timing; unsigned int clock; + struct clk *axi_clk; int phy_type; /* |