diff options
author | Renius Chen <reniuschengl@gmail.com> | 2021-01-06 11:53:32 +0300 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2021-02-01 13:54:44 +0300 |
commit | 15f908fafc0e43899e92528e044511a7b3d4aeb3 (patch) | |
tree | d92fe8dc4b0d0a7ced9f7330ebc6b4c5d4077a84 /drivers/mmc/host/sdhci-pci-gli.c | |
parent | 8b2805647acf3da1f0a2e5c37a103c6853052730 (diff) | |
download | linux-15f908fafc0e43899e92528e044511a7b3d4aeb3.tar.xz |
mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI support
Add a vendor-specific bit named GLI_9763E_MB_ERP_ON at the bit7 of
register 888h to decide whether to enhance random R/W performance
of GL9763E. CQHCI support will be enabled if and only if the bit is
set and the GLI_9763E_MB_CMQ_OFF bit is not set.
Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Link: https://lore.kernel.org/r/20210106085332.5494-1-reniuschengl@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pci-gli.c')
-rw-r--r-- | drivers/mmc/host/sdhci-pci-gli.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index b85edd62e7f0..c6a107d7c742 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -84,6 +84,7 @@ #define GLI_9763E_VHS_REV_W 0x2 #define PCIE_GLI_9763E_MB 0x888 #define GLI_9763E_MB_CMDQ_OFF BIT(19) +#define GLI_9763E_MB_ERP_ON BIT(7) #define PCIE_GLI_9763E_SCR 0x8E0 #define GLI_9763E_SCR_AXI_REQ BIT(9) @@ -814,7 +815,8 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot) pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value); if (!(value & GLI_9763E_MB_CMDQ_OFF)) - host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; + if (value & GLI_9763E_MB_ERP_ON) + host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; gli_pcie_enable_msi(slot); host->mmc_host_ops.hs400_enhanced_strobe = |