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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-07 20:59:32 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-07 20:59:32 +0300 |
commit | 9aa900c8094dba7a60dc805ecec1e9f720744ba1 (patch) | |
tree | 3cc09a579f8ea6d3a182076ba722f7c1648e682d /drivers/misc/habanalabs/pci.c | |
parent | f558b8364e19f9222e7976c64e9367f66bab02cc (diff) | |
parent | 05c8a4fc44a916dd897769ca69b42381f9177ec4 (diff) | |
download | linux-9aa900c8094dba7a60dc805ecec1e9f720744ba1.tar.xz |
Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here is the large set of char/misc driver patches for 5.8-rc1
Included in here are:
- habanalabs driver updates, loads
- mhi bus driver updates
- extcon driver updates
- clk driver updates (approved by the clock maintainer)
- firmware driver updates
- fpga driver updates
- gnss driver updates
- coresight driver updates
- interconnect driver updates
- parport driver updates (it's still alive!)
- nvmem driver updates
- soundwire driver updates
- visorbus driver updates
- w1 driver updates
- various misc driver updates
In short, loads of different driver subsystem updates along with the
drivers as well.
All have been in linux-next for a while with no reported issues"
* tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits)
habanalabs: correctly cast u64 to void*
habanalabs: initialize variable to default value
extcon: arizona: Fix runtime PM imbalance on error
extcon: max14577: Add proper dt-compatible strings
extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
extcon: remove redundant assignment to variable idx
w1: omap-hdq: print dev_err if irq flags are not cleared
w1: omap-hdq: fix interrupt handling which did show spurious timeouts
w1: omap-hdq: fix return value to be -1 if there is a timeout
w1: omap-hdq: cleanup to add missing newline for some dev_dbg
/dev/mem: Revoke mappings when a driver claims the region
misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages()
misc: xilinx-sdfec: cleanup return value in xsdfec_table_write()
misc: xilinx-sdfec: improve get_user_pages_fast() error handling
nvmem: qfprom: remove incorrect write support
habanalabs: handle MMU cache invalidation timeout
habanalabs: don't allow hard reset with open processes
habanalabs: GAUDI does not support soft-reset
habanalabs: add print for soft reset due to event
habanalabs: improve MMU cache invalidation code
...
Diffstat (limited to 'drivers/misc/habanalabs/pci.c')
-rw-r--r-- | drivers/misc/habanalabs/pci.c | 63 |
1 files changed, 28 insertions, 35 deletions
diff --git a/drivers/misc/habanalabs/pci.c b/drivers/misc/habanalabs/pci.c index c98d88c7a5c6..9f634ef6f5b3 100644 --- a/drivers/misc/habanalabs/pci.c +++ b/drivers/misc/habanalabs/pci.c @@ -267,6 +267,12 @@ int hl_pci_init_iatu(struct hl_device *hdev, u64 sram_base_address, /* Enable + Bar match + match enable */ rc |= hl_pci_iatu_write(hdev, 0x104, 0xC0080000); + /* Return the DBI window to the default location */ + rc |= hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0); + rc |= hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr + 4, 0); + + hdev->asic_funcs->set_dma_mask_from_fw(hdev); + /* Point to DRAM */ if (!hdev->asic_funcs->set_dram_bar_base) return -EINVAL; @@ -274,7 +280,6 @@ int hl_pci_init_iatu(struct hl_device *hdev, u64 sram_base_address, U64_MAX) return -EIO; - /* Outbound Region 0 - Point to Host */ host_phys_end_addr = host_phys_base_address + host_phys_size - 1; rc |= hl_pci_iatu_write(hdev, 0x008, @@ -283,7 +288,12 @@ int hl_pci_init_iatu(struct hl_device *hdev, u64 sram_base_address, upper_32_bits(host_phys_base_address)); rc |= hl_pci_iatu_write(hdev, 0x010, lower_32_bits(host_phys_end_addr)); rc |= hl_pci_iatu_write(hdev, 0x014, 0); - rc |= hl_pci_iatu_write(hdev, 0x018, 0); + + if ((hdev->power9_64bit_dma_enable) && (hdev->dma_mask == 64)) + rc |= hl_pci_iatu_write(hdev, 0x018, 0x08000000); + else + rc |= hl_pci_iatu_write(hdev, 0x018, 0); + rc |= hl_pci_iatu_write(hdev, 0x020, upper_32_bits(host_phys_end_addr)); /* Increase region size */ rc |= hl_pci_iatu_write(hdev, 0x000, 0x00002000); @@ -310,41 +320,25 @@ int hl_pci_init_iatu(struct hl_device *hdev, u64 sram_base_address, * * Return: 0 on success, non-zero for failure. */ -int hl_pci_set_dma_mask(struct hl_device *hdev, u8 dma_mask) +static int hl_pci_set_dma_mask(struct hl_device *hdev) { struct pci_dev *pdev = hdev->pdev; int rc; /* set DMA mask */ - rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_mask)); + rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(hdev->dma_mask)); if (rc) { - dev_warn(hdev->dev, + dev_err(hdev->dev, "Failed to set pci dma mask to %d bits, error %d\n", - dma_mask, rc); - - dma_mask = hdev->dma_mask; - - rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_mask)); - if (rc) { - dev_err(hdev->dev, - "Failed to set pci dma mask to %d bits, error %d\n", - dma_mask, rc); - return rc; - } + hdev->dma_mask, rc); + return rc; } - /* - * We managed to set the dma mask, so update the dma mask field. If - * the set to the coherent mask will fail with that mask, we will - * fail the entire function - */ - hdev->dma_mask = dma_mask; - - rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_mask)); + rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(hdev->dma_mask)); if (rc) { dev_err(hdev->dev, "Failed to set pci consistent dma mask to %d bits, error %d\n", - dma_mask, rc); + hdev->dma_mask, rc); return rc; } @@ -354,21 +348,16 @@ int hl_pci_set_dma_mask(struct hl_device *hdev, u8 dma_mask) /** * hl_pci_init() - PCI initialization code. * @hdev: Pointer to hl_device structure. - * @dma_mask: number of bits for the requested dma mask. * * Set DMA masks, initialize the PCI controller and map the PCI BARs. * * Return: 0 on success, non-zero for failure. */ -int hl_pci_init(struct hl_device *hdev, u8 dma_mask) +int hl_pci_init(struct hl_device *hdev) { struct pci_dev *pdev = hdev->pdev; int rc; - rc = hl_pci_set_dma_mask(hdev, dma_mask); - if (rc) - return rc; - if (hdev->reset_pcilink) hl_pci_reset_link_through_bridge(hdev); @@ -380,18 +369,22 @@ int hl_pci_init(struct hl_device *hdev, u8 dma_mask) pci_set_master(pdev); - rc = hdev->asic_funcs->init_iatu(hdev); + rc = hdev->asic_funcs->pci_bars_map(hdev); if (rc) { - dev_err(hdev->dev, "Failed to initialize iATU\n"); + dev_err(hdev->dev, "Failed to initialize PCI BARs\n"); goto disable_device; } - rc = hdev->asic_funcs->pci_bars_map(hdev); + rc = hdev->asic_funcs->init_iatu(hdev); if (rc) { - dev_err(hdev->dev, "Failed to initialize PCI BARs\n"); + dev_err(hdev->dev, "Failed to initialize iATU\n"); goto disable_device; } + rc = hl_pci_set_dma_mask(hdev); + if (rc) + goto disable_device; + return 0; disable_device: |