diff options
| author | Micky Ching <micky_ching@realsil.com.cn> | 2015-02-25 08:50:10 +0300 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2015-03-03 19:41:17 +0300 |
| commit | 9e33ce79f828eb5a1bb9dd4830c7fa719d4279dc (patch) | |
| tree | 79443d44f62bebfd4eace1cc9ba75ee61dc5a860 /drivers/mfd | |
| parent | ada71f5588320e7a5c7166cb7c1c8c40cb866ac4 (diff) | |
| download | linux-9e33ce79f828eb5a1bb9dd4830c7fa719d4279dc.tar.xz | |
mfd: rtsx: Update PETXCFG address
PETXCFG is defined at 0xFF03, the old 0xFE49 not used any more.
Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd')
| -rw-r--r-- | drivers/mfd/rts5227.c | 6 | ||||
| -rw-r--r-- | drivers/mfd/rts5249.c | 6 |
2 files changed, 4 insertions, 8 deletions
diff --git a/drivers/mfd/rts5227.c b/drivers/mfd/rts5227.c index 32407404d838..1f387d4cec6c 100644 --- a/drivers/mfd/rts5227.c +++ b/drivers/mfd/rts5227.c @@ -118,11 +118,9 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) rts5227_fill_driving(pcr, OUTPUT_3V3); /* Configure force_clock_req */ if (pcr->flags & PCR_REVERSE_SOCKET) - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB8, 0xB8); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0xB8); else - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB8, 0x88); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0x88); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00); return rtsx_pci_send_cmd(pcr, 100); diff --git a/drivers/mfd/rts5249.c b/drivers/mfd/rts5249.c index cf425cc959d5..225ad5527d3e 100644 --- a/drivers/mfd/rts5249.c +++ b/drivers/mfd/rts5249.c @@ -116,11 +116,9 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) /* Configure driving */ rts5249_fill_driving(pcr, OUTPUT_3V3); if (pcr->flags & PCR_REVERSE_SOCKET) - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB0, 0xB0); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0); else - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB0, 0x80); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00); return rtsx_pci_send_cmd(pcr, 100); |