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author | Yong Wu <yong.wu@mediatek.com> | 2017-08-21 14:00:20 +0300 |
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committer | Joerg Roedel <jroedel@suse.de> | 2017-08-22 17:38:00 +0300 |
commit | 30e2fccf9512380b5cdceffe04d776f5e6de6b49 (patch) | |
tree | ae798165f6d76231b31ef6c5c62f49bc8d39a17e /drivers/memory | |
parent | 6254b64f570622d4ebb7af00d46229bfc7346212 (diff) | |
download | linux-30e2fccf9512380b5cdceffe04d776f5e6de6b49.tar.xz |
iommu/mediatek: Enlarge the validate PA range for 4GB mode
This patch is for 4GB mode, mainly for 4 issues:
1) Fix a 4GB bug:
if the dram base is 0x4000_0000, the dram size is 0xc000_0000.
then the code just meet a corner case because max_pfn is
0x10_0000.
data->enable_4GB = !!(max_pfn > (0xffffffffUL >> PAGE_SHIFT));
It's true at the case above. That is unexpected.
2) In mt2712, there is a new register for the 4GB PA range(0x118)
we should enlarge the max PA range, or the HW will report
error.
The dram range is from 0x1_0000_0000 to 0x1_ffff_ffff in the 4GB
mode, we cut out the bit[32:30] of the SA(Start address) and
EA(End address) into this REG_MMU_VLD_PA_RNG(0x118).
3) In mt2712, the register(0x13c) is extended for 4GB mode.
bit[7:6] indicate the valid PA[32:33]. Thus, we don't mask the
value and print it directly for debug.
4) if 4GB is enabled, the dram PA range is from 0x1_0000_0000 to
0x1_ffff_ffff. Thus, the PA from iova_to_pa should also '|' BIT(32)
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/memory')
0 files changed, 0 insertions, 0 deletions