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| author | Dmitry Osipenko <digetx@gmail.com> | 2018-04-09 22:28:29 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-04-27 12:23:04 +0300 |
| commit | 1c74d5c0de0c2cc29fef97a19251da2ad6f579bd (patch) | |
| tree | 947043f811ee1f23df4060f0774228bae8add4b1 /drivers/memory/tegra/tegra210.c | |
| parent | db4a9c1935760c86f2d0a3612c2f6c658c5bb031 (diff) | |
| download | linux-1c74d5c0de0c2cc29fef97a19251da2ad6f579bd.tar.xz | |
memory: tegra: Apply interrupts mask per SoC
Currently we are enabling handling of interrupts specific to Tegra124+
which happen to overlap with previous generations. Let's specify
interrupts mask per SoC generation for consistency and in a preparation
of squashing of Tegra20 driver into the common one that will enable
handling of GART faults which may be undesirable by newer generations.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/tegra210.c')
| -rw-r--r-- | drivers/memory/tegra/tegra210.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c index d398bcd3fc57..3b8d0100088c 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c @@ -1092,4 +1092,7 @@ const struct tegra_mc_soc tegra210_mc_soc = { .atom_size = 64, .client_id_mask = 0xff, .smmu = &tegra210_smmu_soc, + .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | + MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | + MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, }; |