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authorSakari Ailus <sakari.ailus@linux.intel.com>2020-06-25 15:13:55 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 17:34:47 +0300
commitc3833a228cef7121cb7fc64d5ef71eedcc6f2f01 (patch)
tree7312741116b1d6b6e9cca1ab2fc788a8e98b5479 /drivers/media
parent583791191c6d52528ae13a1812ecae43dfa12440 (diff)
downloadlinux-c3833a228cef7121cb7fc64d5ef71eedcc6f2f01.tar.xz
media: ccs-pll: Don't use div_u64 to divide a 32-bit number
pll->pll_op_clk_freq is a 32-bit number. It does not need div_u64 to divide it. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/i2c/ccs-pll.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
index 0d57bac1599a..1cfe6cf7e51c 100644
--- a/drivers/media/i2c/ccs-pll.c
+++ b/drivers/media/i2c/ccs-pll.c
@@ -445,7 +445,7 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *limits,
min_pre_pll_clk_div, max_pre_pll_clk_div);
i = gcd(pll->pll_op_clk_freq_hz, pll->ext_clk_freq_hz);
- mul = div_u64(pll->pll_op_clk_freq_hz, i);
+ mul = pll->pll_op_clk_freq_hz / i;
div = pll->ext_clk_freq_hz / i;
dev_dbg(dev, "mul %u / div %u\n", mul, div);