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| author | Jiri Kosina <jkosina@suse.cz> | 2012-04-08 23:48:52 +0400 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2012-04-08 23:48:52 +0400 |
| commit | e75d660672ddd11704b7f0fdb8ff21968587b266 (patch) | |
| tree | ccb9c107744c10b553c0373e450bee3971d16c00 /drivers/media/video/aptina-pll.h | |
| parent | 61282f37927143e45b03153f3e7b48d6b702147a (diff) | |
| parent | 0034102808e0dbbf3a2394b82b1bb40b5778de9e (diff) | |
| download | linux-e75d660672ddd11704b7f0fdb8ff21968587b266.tar.xz | |
Merge branch 'master' into for-next
Merge with latest Linus' tree, as I have incoming patches
that fix code that is newer than current HEAD of for-next.
Conflicts:
drivers/net/ethernet/realtek/r8169.c
Diffstat (limited to 'drivers/media/video/aptina-pll.h')
| -rw-r--r-- | drivers/media/video/aptina-pll.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/drivers/media/video/aptina-pll.h b/drivers/media/video/aptina-pll.h new file mode 100644 index 000000000000..b370e341e75d --- /dev/null +++ b/drivers/media/video/aptina-pll.h @@ -0,0 +1,56 @@ +/* + * Aptina Sensor PLL Configuration + * + * Copyright (C) 2012 Laurent Pinchart <laurent.pinchart@ideasonboard.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + */ + +#ifndef __APTINA_PLL_H +#define __APTINA_PLL_H + +struct aptina_pll { + unsigned int ext_clock; + unsigned int pix_clock; + + unsigned int n; + unsigned int m; + unsigned int p1; +}; + +struct aptina_pll_limits { + unsigned int ext_clock_min; + unsigned int ext_clock_max; + unsigned int int_clock_min; + unsigned int int_clock_max; + unsigned int out_clock_min; + unsigned int out_clock_max; + unsigned int pix_clock_max; + + unsigned int n_min; + unsigned int n_max; + unsigned int m_min; + unsigned int m_max; + unsigned int p1_min; + unsigned int p1_max; +}; + +struct device; + +int aptina_pll_calculate(struct device *dev, + const struct aptina_pll_limits *limits, + struct aptina_pll *pll); + +#endif /* __APTINA_PLL_H */ |