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authorHeiner Kallweit <hkallweit1@gmail.com>2015-12-30 19:40:47 +0300
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2016-01-25 20:45:35 +0300
commite1a7d981cfefbf8e0261083a10ccad7dd0af6394 (patch)
tree78cf75f93f406f763e9056fecc1bfb51ac89c134 /drivers/media/rc
parenta17ede9ac1d8164e4d0b0b58e21bfa40890818d2 (diff)
downloadlinux-e1a7d981cfefbf8e0261083a10ccad7dd0af6394.tar.xz
[media] nuvoton-cir: fix clearing wake fifo
At least on NVT6779D clearing the wake fifo works in learning mode only (although this condition is not mentioned in the chip spec). Setting the clear fifo bit has no effect in wake up mode. Even if clearing the wake fifo should work in wake up mode on other chips this workaround doesn't hurt. If needed the caller of nvt_clear_cir_wake_fifo has to take care of locking. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/rc')
-rw-r--r--drivers/media/rc/nuvoton-cir.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c
index ceb6b95b13fa..5f36227a9059 100644
--- a/drivers/media/rc/nuvoton-cir.c
+++ b/drivers/media/rc/nuvoton-cir.c
@@ -370,11 +370,19 @@ static void nvt_clear_cir_fifo(struct nvt_dev *nvt)
/* clear out the hardware's cir wake rx fifo */
static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt)
{
- u8 val;
+ u8 val, config;
+
+ config = nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRCON);
+
+ /* clearing wake fifo works in learning mode only */
+ nvt_cir_wake_reg_write(nvt, config & ~CIR_WAKE_IRCON_MODE0,
+ CIR_WAKE_IRCON);
val = nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFOCON);
nvt_cir_wake_reg_write(nvt, val | CIR_WAKE_FIFOCON_RXFIFOCLR,
CIR_WAKE_FIFOCON);
+
+ nvt_cir_wake_reg_write(nvt, config, CIR_WAKE_IRCON);
}
/* clear out the hardware's cir tx fifo */