diff options
| author | Jarod Wilson <jarod@redhat.com> | 2011-04-12 20:38:27 +0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-05-20 16:27:35 +0400 |
| commit | 39381d4fcd97462f0262bef382b7643f17787587 (patch) | |
| tree | 0b24dc25a6575c08ebbf55227cb71e50f803b8a7 /drivers/media/rc/nuvoton-cir.c | |
| parent | 362d3a3a9592598cef1d3e211ad998eb844dc5f3 (diff) | |
| download | linux-39381d4fcd97462f0262bef382b7643f17787587.tar.xz | |
[media] rc/nuvoton-cir: enable CIR on w83667hg chip variant
Thanks to some excellent investigative work by Douglas Clowes, it was
uncovered that the older w83667hg Nuvoton chip functions with this
driver after actually enabling the CIR function via its multi-function
chip config register. The CIR and CIR wide-band sensor enable bits are
just in a different place on this hardware, so we only poke register
0x27 on 677 hardware now, and we poke register 0x2c on the 667 now.
Reported-by: Douglas Clowes <dclowes1@optusnet.com.au>
Signed-off-by: Jarod Wilson <jarod@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/rc/nuvoton-cir.c')
| -rw-r--r-- | drivers/media/rc/nuvoton-cir.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c index bc5c1e267512..5d93384d2d35 100644 --- a/drivers/media/rc/nuvoton-cir.c +++ b/drivers/media/rc/nuvoton-cir.c @@ -291,13 +291,23 @@ static int nvt_hw_detect(struct nvt_dev *nvt) static void nvt_cir_ldev_init(struct nvt_dev *nvt) { - u8 val; + u8 val, psreg, psmask, psval; + + if (nvt->chip_major == CHIP_ID_HIGH_667) { + psreg = CR_MULTIFUNC_PIN_SEL; + psmask = MULTIFUNC_PIN_SEL_MASK; + psval = MULTIFUNC_ENABLE_CIR | MULTIFUNC_ENABLE_CIRWB; + } else { + psreg = CR_OUTPUT_PIN_SEL; + psmask = OUTPUT_PIN_SEL_MASK; + psval = OUTPUT_ENABLE_CIR | OUTPUT_ENABLE_CIRWB; + } - /* output pin selection (Pin95=CIRRX, Pin96=CIRTX1, WB enabled */ - val = nvt_cr_read(nvt, CR_OUTPUT_PIN_SEL); - val &= OUTPUT_PIN_SEL_MASK; - val |= (OUTPUT_ENABLE_CIR | OUTPUT_ENABLE_CIRWB); - nvt_cr_write(nvt, val, CR_OUTPUT_PIN_SEL); + /* output pin selection: enable CIR, with WB sensor enabled */ + val = nvt_cr_read(nvt, psreg); + val &= psmask; + val |= psval; + nvt_cr_write(nvt, val, psreg); /* Select CIR logical device and enable */ nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR); |