diff options
| author | Jonathan Marek <jonathan@marek.ca> | 2021-12-22 03:37:48 +0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@kernel.org> | 2022-01-23 23:18:41 +0300 |
| commit | b4436a18eedb8d93e148d009b145b4ae142e6f9d (patch) | |
| tree | eea1b0645f0aada1fb878e7d3742a62306b252a8 /drivers/media/platform/qcom/camss/camss-csid.c | |
| parent | e53d660843de6c98322f2a57eabaf4ce605a83fb (diff) | |
| download | linux-b4436a18eedb8d93e148d009b145b4ae142e6f9d.tar.xz | |
media: camss: add support for SM8250 camss
The Titan 480 camss found on SM8250 has 6 CSIPHY and 4 VFE/CSID.
CSID is compatible with the Titan 170 CSID, but the Titan 480 CSID are
inside the VFE region (between the "top" and "bus" registers), so a
workaround is added to avoid ioremap failure.
[bod] Fixed setting camnoc_axi_clk_src instead of camcc_camnoc_axi_clk
[jgrahsl, bod] Add slow_ahb_src clock values
[jgrahsl, bod] Add cpa_ahb clock values
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Julian Grahsl <jgrahsl@snap.com>
Co-developed-by: Julian Grahsl <jgrahsl@snap.com>
Signed-off-by: Julian Grahsl <jgrahsl@snap.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'drivers/media/platform/qcom/camss/camss-csid.c')
| -rw-r--r-- | drivers/media/platform/qcom/camss/camss-csid.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index 1226913c623b..9ef6fbbeeddf 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -25,6 +25,10 @@ #include "camss-csid-gen1.h" #include "camss.h" +/* offset of CSID registers in VFE region for VFE 480 */ +#define VFE_480_CSID_OFFSET 0x1200 +#define VFE_480_LITE_CSID_OFFSET 0x200 + #define MSM_CSID_NAME "msm_csid" const char * const csid_testgen_modes[] = { @@ -559,8 +563,9 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, } else if (camss->version == CAMSS_8x96 || camss->version == CAMSS_660) { csid->ops = &csid_ops_4_7; - } else if (camss->version == CAMSS_845) { - csid->ops = &csid_ops_170; + } else if (camss->version == CAMSS_845 || + camss->version == CAMSS_8250) { + csid->ops = &csid_ops_gen2; } else { return -EINVAL; } @@ -568,9 +573,20 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, /* Memory */ - csid->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]); - if (IS_ERR(csid->base)) - return PTR_ERR(csid->base); + if (camss->version == CAMSS_8250) { + /* for titan 480, CSID registers are inside the VFE region, + * between the VFE "top" and "bus" registers. this requires + * VFE to be initialized before CSID + */ + if (id >= 2) /* VFE/CSID lite */ + csid->base = camss->vfe[id].base + VFE_480_LITE_CSID_OFFSET; + else + csid->base = camss->vfe[id].base + VFE_480_CSID_OFFSET; + } else { + csid->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]); + if (IS_ERR(csid->base)) + return PTR_ERR(csid->base); + } /* Interrupt */ |