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authorSylwester Nawrocki <s.nawrocki@samsung.com>2013-03-20 22:31:03 +0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-04-05 03:23:24 +0400
commite90ad659cde4d11ccbc935adcfe018799afcc22d (patch)
tree6210875ebfa690b63a44e8eba5799ca756310de3 /drivers/media/platform/exynos4-is/fimc-lite-reg.h
parent9c8399c86cbfce767fb32459f8e0eb33e087f910 (diff)
downloadlinux-e90ad659cde4d11ccbc935adcfe018799afcc22d.tar.xz
[media] exynos4-is: Allow colorspace conversion at FIMC-LITE
The FIMC-LITE output DMA allows to configure different YUV order than the order at the camera input interface. Thus there is some limited colorspace conversion possible. This patch makes the color format variable be per FIMC-LITE input/output, rather than a global per device. This also fixes incorrect behavior where color format at the FIMC-LITE.N subdev's source pad is modified by VIDIOC_S_FMT ioctl on the related video node. YUV order definitions are corrected so that we use notation: | byte3 | byte2 | byte1 | byte0 -------+-------+-------+-------+------ YCBYCR | CR | Y | CB | Y YCRYCB | CB | Y | CR | Y CBYCRY | Y | CR | Y | CB CRYCBY | Y | CB | Y | CR Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/platform/exynos4-is/fimc-lite-reg.h')
-rw-r--r--drivers/media/platform/exynos4-is/fimc-lite-reg.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/media/platform/exynos4-is/fimc-lite-reg.h b/drivers/media/platform/exynos4-is/fimc-lite-reg.h
index 0e345844c13a..390383941c19 100644
--- a/drivers/media/platform/exynos4-is/fimc-lite-reg.h
+++ b/drivers/media/platform/exynos4-is/fimc-lite-reg.h
@@ -72,10 +72,10 @@
#define FLITE_REG_CIODMAFMT 0x18
#define FLITE_REG_CIODMAFMT_RAW_CON (1 << 15)
#define FLITE_REG_CIODMAFMT_PACK12 (1 << 14)
-#define FLITE_REG_CIODMAFMT_CRYCBY (0 << 4)
-#define FLITE_REG_CIODMAFMT_CBYCRY (1 << 4)
-#define FLITE_REG_CIODMAFMT_YCRYCB (2 << 4)
-#define FLITE_REG_CIODMAFMT_YCBYCR (3 << 4)
+#define FLITE_REG_CIODMAFMT_YCBYCR (0 << 4)
+#define FLITE_REG_CIODMAFMT_YCRYCB (1 << 4)
+#define FLITE_REG_CIODMAFMT_CBYCRY (2 << 4)
+#define FLITE_REG_CIODMAFMT_CRYCBY (3 << 4)
#define FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK (0x3 << 4)
/* Camera Output Canvas */