diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2019-12-12 17:23:27 +0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2019-12-16 12:09:12 +0300 |
| commit | 02d76a471975382ccf7f9d4b0859e00fe723265f (patch) | |
| tree | dc49e38ceff91a910d7bbcaa5f2f5d1c875001de /drivers/media/platform/coda/coda-bit.c | |
| parent | afddf553ea8929c722921bfa3607e3586629442f (diff) | |
| download | linux-02d76a471975382ccf7f9d4b0859e00fe723265f.tar.xz | |
media: coda: avoid hardware lockups with more than 13 capture buffers
When decoding using the CODA internal rotator (for example NV12
capture), currently the value vb2_buf.index + CODA_MAX_FRAMEBUFFERS (19)
is written into the DEC_PIC_ROT_INDEX register. At least with firmware
version 3.1.1 this causes CODA hangups as soon as the register value
reaches 32. Instead, always write CODA_MAX_FRAMEBUFFERS.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/platform/coda/coda-bit.c')
| -rw-r--r-- | drivers/media/platform/coda/coda-bit.c | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/drivers/media/platform/coda/coda-bit.c b/drivers/media/platform/coda/coda-bit.c index 5475de176ce3..3443396ba5f3 100644 --- a/drivers/media/platform/coda/coda-bit.c +++ b/drivers/media/platform/coda/coda-bit.c @@ -2168,16 +2168,21 @@ static int coda_prepare_decode(struct coda_ctx *ctx) } else { if (dev->devtype->product == CODA_960) { /* - * The CODA960 seems to have an internal list of - * buffers with 64 entries that includes the - * registered frame buffers as well as the rotator - * buffer output. - * - * ROT_INDEX needs to be < 0x40, but > - * ctx->num_internal_frames. + * It was previously assumed that the CODA960 has an + * internal list of 64 buffer entries that contains + * both the registered internal frame buffers as well + * as the rotator buffer output, and that the ROT_INDEX + * register must be set to a value between the last + * internal frame buffers' index and 64. + * At least on firmware version 3.1.1 it turns out that + * setting ROT_INDEX to any value >= 32 causes CODA + * hangups that it can not recover from with the SRC VPU + * reset. + * It does appear to work however, to just set it to a + * fixed value in the [ctx->num_internal_frames, 31] + * range, for example CODA_MAX_FRAMEBUFFERS. */ - coda_write(dev, - CODA_MAX_FRAMEBUFFERS + dst_buf->vb2_buf.index, + coda_write(dev, CODA_MAX_FRAMEBUFFERS, CODA9_CMD_DEC_PIC_ROT_INDEX); reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y; |