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| author | Daniel Scally <djrscally@gmail.com> | 2021-11-23 03:00:04 +0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2021-11-30 12:52:35 +0300 |
| commit | 651d1f2040ac46d87c67cfe512bbd7668c34fec6 (patch) | |
| tree | a3c80cc440469a2e597486bdcb5644a70f992892 /drivers/media/i2c/ov8865.c | |
| parent | dc69bc7a2e09791d8466202a5b10b14400191116 (diff) | |
| download | linux-651d1f2040ac46d87c67cfe512bbd7668c34fec6.tar.xz | |
media: i2c: Fix incorrect value in comment
The PLL configuration defined here sets 72MHz (which is correct), not
80MHz. Correct the comment.
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Daniel Scally <djrscally@gmail.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/i2c/ov8865.c')
| -rw-r--r-- | drivers/media/i2c/ov8865.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/i2c/ov8865.c b/drivers/media/i2c/ov8865.c index 9f1c0d66c4f9..a6372a0989e1 100644 --- a/drivers/media/i2c/ov8865.c +++ b/drivers/media/i2c/ov8865.c @@ -713,7 +713,7 @@ static const struct ov8865_pll2_config ov8865_pll2_config_native = { /* * EXTCLK = 24 MHz * DAC_CLK = 360 MHz - * SCLK = 80 MHz + * SCLK = 72 MHz */ static const struct ov8865_pll2_config ov8865_pll2_config_binning = { |