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authorSakari Ailus <sakari.ailus@linux.intel.com>2020-06-22 13:37:45 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 17:39:38 +0300
commit47b6eaf36eba143860cf4e772a1108b1ef05520d (patch)
treed734d496367ebbc2cf297d46134b74995003395a /drivers/media/i2c/ccs-pll.h
parent6aadbff9d459d4e4ebaedf19d50b0f057574f756 (diff)
downloadlinux-47b6eaf36eba143860cf4e772a1108b1ef05520d.tar.xz
media: ccs-pll: Differentiate between CSI-2 D-PHY and C-PHY
Differentiate between CSI-2 D-PHY and C-PHY. This does not yet include support for C-PHY. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/i2c/ccs-pll.h')
-rw-r--r--drivers/media/i2c/ccs-pll.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/media/i2c/ccs-pll.h b/drivers/media/i2c/ccs-pll.h
index 578c9272688a..d06a80c4fc52 100644
--- a/drivers/media/i2c/ccs-pll.h
+++ b/drivers/media/i2c/ccs-pll.h
@@ -13,7 +13,8 @@
#define CCS_PLL_H
/* CSI-2 or CCP-2 */
-#define CCS_PLL_BUS_TYPE_CSI2 0x00
+#define CCS_PLL_BUS_TYPE_CSI2_DPHY 0x00
+#define CCS_PLL_BUS_TYPE_CSI2_CPHY 0x01
/* op pix clock is for all lanes in total normally */
#define CCS_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)