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author | Andrew Lunn <andrew@lunn.ch> | 2014-02-07 03:41:58 +0400 |
---|---|---|
committer | Jiri Slaby <jslaby@suse.cz> | 2014-03-05 20:13:52 +0400 |
commit | 054865c954ae9d31e5cfd1010e6e15a02d39ce96 (patch) | |
tree | 5003cf3aa09f61d77653a0b0cf2f41a04bfa7515 /drivers/irqchip | |
parent | 6b32598699db3b8f60ed3d2ffa50b880c95e1fd5 (diff) | |
download | linux-054865c954ae9d31e5cfd1010e6e15a02d39ce96.tar.xz |
irqchip: orion: Fix getting generic chip pointer.
commit d86e9af6336c0ad586a5dbd70064253d40bbb5ff upstream.
Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fixes: 9dbd90f17e4f ("irqchip: Add support for Marvell Orion SoCs")
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-orion.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c index 0dfdc5c824a1..8e41be62812e 100644 --- a/drivers/irqchip/irq-orion.c +++ b/drivers/irqchip/irq-orion.c @@ -111,7 +111,8 @@ IRQCHIP_DECLARE(orion_intc, "marvell,orion-intc", orion_irq_init); static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) { struct irq_domain *d = irq_get_handler_data(irq); - struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, irq); + + struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0); u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) & gc->mask_cache; |