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authorJonas Gorski <jonas.gorski@gmail.com>2023-06-29 10:26:20 +0300
committerMarc Zyngier <maz@kernel.org>2023-07-03 21:47:51 +0300
commit55ad24857341c36616ecc1d9580af5626c226cf1 (patch)
treedbb1015a7ced1281656c59de0add9913ffc1f7cc /drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c
parenta82f3119d543406ed5b242deabf83cdecb9fe523 (diff)
downloadlinux-55ad24857341c36616ecc1d9580af5626c226cf1.tar.xz
irq-bcm6345-l1: Do not assume a fixed block to cpu mapping
The irq to block mapping is fixed, and interrupts from the first block will always be routed to the first parent IRQ. But the parent interrupts themselves can be routed to any available CPU. This is used by the bootloader to map the first parent interrupt to the boot CPU, regardless wether the boot CPU is the first one or the second one. When booting from the second CPU, the assumption that the first block's IRQ is mapped to the first CPU breaks, and the system hangs because interrupts do not get routed correctly. Fix this by passing the appropriate bcm6434_l1_cpu to the interrupt handler instead of the chip itself, so the handler always has the right block. Fixes: c7c42ec2baa1 ("irqchips/bmips: Add bcm6345-l1 interrupt controller") Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230629072620.62527-1-jonas.gorski@gmail.com
Diffstat (limited to 'drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c')
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