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author | Pali Rohár <pali@kernel.org> | 2022-04-25 14:37:05 +0300 |
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committer | Marc Zyngier <maz@kernel.org> | 2022-05-06 14:18:37 +0300 |
commit | a3d66a76348daf559873f19afc912a2a7c2ccdaf (patch) | |
tree | 114a33cc9d5b10241fc9993821754b32cbeed2d9 /drivers/irqchip/irq-aspeed-scu-ic.c | |
parent | 4c5b2be1d071af26749790429726712e4d9105fb (diff) | |
download | linux-a3d66a76348daf559873f19afc912a2a7c2ccdaf.tar.xz |
irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x
Register ARMADA_370_XP_INT_FABRIC_MASK_OFFS is Armada 370 and XP specific
and on new Armada platforms it has different meaning. It does not configure
Performance Counter Overflow interrupt masking. So do not touch this
register on non-A370/XP platforms (A375, A38x and A39x).
Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: stable@vger.kernel.org
Fixes: 28da06dfd9e4 ("irqchip: armada-370-xp: Enable the PMU interrupts")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220425113706.29310-1-pali@kernel.org
Diffstat (limited to 'drivers/irqchip/irq-aspeed-scu-ic.c')
0 files changed, 0 insertions, 0 deletions