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authorHiroshi Doyu <hdoyu@nvidia.com>2012-11-28 17:52:53 +0400
committerJoerg Roedel <joro@8bytes.org>2012-11-28 19:11:52 +0400
commit37683e45623a0ccd34761c71aad618cc129fe35c (patch)
treeb02d6d8853a94c0c2af7623c83c36614b20b7b31 /drivers/iommu
parent9489e9dcae718d5fde988e4a684a0f55b5f94d17 (diff)
downloadlinux-37683e45623a0ccd34761c71aad618cc129fe35c.tar.xz
iommu/tegra: smmu: Remove unnecessary PTC/TLB flush all
smmu_flush_regs() does TLB/PTC flush all when freeing a second level page table. This isn't necessay at all since each pte entry has been already maintained by address in the above flush_ptc_and_tlb(). Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
Diffstat (limited to 'drivers/iommu')
-rw-r--r--drivers/iommu/tegra-smmu.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index c0f7a4266263..48538a6d2198 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -696,10 +696,8 @@ static void __smmu_iommu_unmap(struct smmu_as *as, dma_addr_t iova)
*pte = _PTE_VACANT(iova);
FLUSH_CPU_DCACHE(pte, page, sizeof(*pte));
flush_ptc_and_tlb(as->smmu, as, iova, pte, page, 0);
- if (!--(*count)) {
+ if (!--(*count))
free_ptbl(as, iova);
- smmu_flush_regs(as->smmu, 0);
- }
}
static void __smmu_iommu_map_pfn(struct smmu_as *as, dma_addr_t iova,