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authorYong Wu <yong.wu@mediatek.com>2022-05-03 10:14:17 +0300
committerJoerg Roedel <jroedel@suse.de>2022-05-04 11:39:40 +0300
commit9485a04a5bb97e2b9749277005e1f7c23b9ec8be (patch)
treeb3bec956cfaf641dad48d0d2f33cce1d042fbabc /drivers/iommu/mtk_iommu.h
parent634f57df1f3b61cc1b1441762718a14da28c27f8 (diff)
downloadlinux-9485a04a5bb97e2b9749277005e1f7c23b9ec8be.tar.xz
iommu/mediatek: Separate mtk_iommu_data for v1 and v2
Prepare for adding the structure "mtk_iommu_bank_data". No functional change. The mtk_iommu_domain in v1 and v2 are different, we could not add current data as bank[0] in v1 simplistically. Currently we have no plan to add new SoC for v1, in order to avoid affect v1 when we add many new features for v2, I totally separate v1 and v2 in this patch, there are many structures only for v2. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220503071427.2285-27-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/mtk_iommu.h')
-rw-r--r--drivers/iommu/mtk_iommu.h81
1 files changed, 0 insertions, 81 deletions
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index f2ee11cd254a..305243e18aa9 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -7,23 +7,14 @@
#ifndef _MTK_IOMMU_H_
#define _MTK_IOMMU_H_
-#include <linux/clk.h>
-#include <linux/component.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/io-pgtable.h>
#include <linux/iommu.h>
-#include <linux/list.h>
#include <linux/spinlock.h>
-#include <linux/dma-mapping.h>
#include <soc/mediatek/smi.h>
#include <dt-bindings/memory/mtk-memory-port.h>
-#define MTK_LARB_COM_MAX 8
-#define MTK_LARB_SUBCOM_MAX 8
-
-#define MTK_IOMMU_GROUP_MAX 8
-
struct mtk_iommu_suspend_reg {
union {
u32 standard_axi_mode;/* v1 */
@@ -38,76 +29,4 @@ struct mtk_iommu_suspend_reg {
u32 wr_len_ctrl;
};
-enum mtk_iommu_plat {
- M4U_MT2701,
- M4U_MT2712,
- M4U_MT6779,
- M4U_MT8167,
- M4U_MT8173,
- M4U_MT8183,
- M4U_MT8192,
- M4U_MT8195,
-};
-
-struct mtk_iommu_iova_region;
-
-struct mtk_iommu_plat_data {
- enum mtk_iommu_plat m4u_plat;
- u32 flags;
- u32 inv_sel_reg;
-
- char *pericfg_comp_str;
- struct list_head *hw_list;
- unsigned int iova_region_nr;
- const struct mtk_iommu_iova_region *iova_region;
- unsigned char larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
-};
-
-struct mtk_iommu_domain;
-
-struct mtk_iommu_data {
- void __iomem *base;
- int irq;
- struct device *dev;
- struct clk *bclk;
- phys_addr_t protect_base; /* protect memory base */
- struct mtk_iommu_suspend_reg reg;
- struct mtk_iommu_domain *m4u_dom;
- struct iommu_group *m4u_group[MTK_IOMMU_GROUP_MAX];
- bool enable_4GB;
- spinlock_t tlb_lock; /* lock for tlb range flush */
-
- struct iommu_device iommu;
- const struct mtk_iommu_plat_data *plat_data;
- struct device *smicomm_dev;
-
- struct dma_iommu_mapping *mapping; /* For mtk_iommu_v1.c */
- struct regmap *pericfg;
-
- struct mutex mutex; /* Protect m4u_group/m4u_dom above */
-
- /*
- * In the sharing pgtable case, list data->list to the global list like m4ulist.
- * In the non-sharing pgtable case, list data->list to the itself hw_list_head.
- */
- struct list_head *hw_list;
- struct list_head hw_list_head;
- struct list_head list;
- struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX];
-};
-
-static inline int mtk_iommu_bind(struct device *dev)
-{
- struct mtk_iommu_data *data = dev_get_drvdata(dev);
-
- return component_bind_all(dev, &data->larb_imu);
-}
-
-static inline void mtk_iommu_unbind(struct device *dev)
-{
- struct mtk_iommu_data *data = dev_get_drvdata(dev);
-
- component_unbind_all(dev, &data->larb_imu);
-}
-
#endif