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authorRobin Murphy <robin.murphy@arm.com>2016-09-12 19:13:47 +0300
committerWill Deacon <will.deacon@arm.com>2016-09-16 11:34:17 +0300
commit95fa99aa402ad516ec825057a168f395ece39a2e (patch)
tree14a77be228e0dbb065d0c034be2894b14a277af6 /drivers/iommu/fsl_pamu_domain.h
parent08d4ca2a672bab34e6640ffa946844d09d4f6f60 (diff)
downloadlinux-95fa99aa402ad516ec825057a168f395ece39a2e.tar.xz
iommu/arm-smmu: Set PRIVCFG in stage 1 STEs
Implement the SMMUv3 equivalent of d346180e70b9 ("iommu/arm-smmu: Treat all device transactions as unprivileged"), so that once again those pesky DMA controllers with their privileged instruction fetches don't unexpectedly fault in stage 1 domains due to VMSAv8 rules. Acked-by: Will Deacon <will.deacon@arm.com> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/iommu/fsl_pamu_domain.h')
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