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authorMauro Carvalho Chehab <mchehab+huawei@kernel.org>2021-06-02 11:59:50 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2021-06-02 11:59:50 +0300
commit80c1c54a2aa3c5177f73fc5d505668df56fb28b6 (patch)
treed17e76cec3366309b27280a8a5b54935a3864fb6 /drivers/iommu/amd
parent71c689dc2e732d4cb190aaf0edea73116b1611bd (diff)
parent8124c8a6b35386f73523d27eacb71b5364a68c4c (diff)
downloadlinux-80c1c54a2aa3c5177f73fc5d505668df56fb28b6.tar.xz
Merge tag 'v5.13-rc4' into media_tree
Linux 5.13-rc4 * tag 'v5.13-rc4': (976 commits) Linux 5.13-rc4 seccomp: Refactor notification handler to prepare for new semantics selftests: kvm: fix overlapping addresses in memslot_perf_test KVM: X86: Kill off ctxt->ud KVM: X86: Fix warning caused by stale emulation context KVM: X86: Use kvm_get_linear_rip() in single-step and #DB/#BP interception Documentation: seccomp: Fix user notification documentation MAINTAINERS: adjust to removing i2c designware platform data perf vendor events powerpc: Fix eventcode of power10 JSON events Revert "serial: 8250: 8250_omap: Fix possible interrupt storm" i2c: s3c2410: fix possible NULL pointer deref on read message after write i2c: mediatek: Disable i2c start_en and clear intr_stat brfore reset perf stat: Fix error check for bpf_program__attach cifs: change format of CIFS_FULL_KEY_DUMP ioctl i2c: i801: Don't generate an interrupt on bus reset i2c: mpc: implement erratum A-004447 workaround powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P1010 i2c controllers powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P2041 i2c controllers dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag i2c: busses: i2c-stm32f4: Remove incorrectly placed ' ' from function name ...
Diffstat (limited to 'drivers/iommu/amd')
-rw-r--r--drivers/iommu/amd/iommu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 80e8e1916dd1..3ac42bbdefc6 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -884,7 +884,7 @@ static inline u64 build_inv_address(u64 address, size_t size)
* The msb-bit must be clear on the address. Just set all the
* lower bits.
*/
- address |= 1ull << (msb_diff - 1);
+ address |= (1ull << msb_diff) - 1;
}
/* Clear bits 11:0 */
@@ -1714,6 +1714,8 @@ static void amd_iommu_probe_finalize(struct device *dev)
domain = iommu_get_domain_for_dev(dev);
if (domain->type == IOMMU_DOMAIN_DMA)
iommu_setup_dma_ops(dev, IOVA_START_PFN << PAGE_SHIFT, 0);
+ else
+ set_dma_ops(dev, NULL);
}
static void amd_iommu_release_device(struct device *dev)