diff options
author | Eugen Hristev <eugen.hristev@microchip.com> | 2020-01-28 15:57:39 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-04-02 17:34:21 +0300 |
commit | 9d25ef1abe73f42c6cf40ca6505dee606742ec8b (patch) | |
tree | 3cc93d21c970ed1efcf52204d9b4eff8b350c0fd /drivers/iio | |
parent | c9a99f738913f03ab48ddd1220b651e71fbd9e79 (diff) | |
download | linux-9d25ef1abe73f42c6cf40ca6505dee606742ec8b.tar.xz |
iio: adc: at91-sama5d2_adc: fix differential channels in triggered mode
[ Upstream commit a500f3bd787f8224341e44b238f318c407b10897 ]
The differential channels require writing the channel offset register (COR).
Otherwise they do not work in differential mode.
The configuration of COR is missing in triggered mode.
Fixes: 5e1a1da0f8c9 ("iio: adc: at91-sama5d2_adc: add hw trigger and buffer support")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/iio')
-rw-r--r-- | drivers/iio/adc/at91-sama5d2_adc.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c index 0898f40c2b89..34639ee2d2ce 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -339,10 +339,25 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) { struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit); + u32 cor; if (!chan) continue; if (state) { + cor = at91_adc_readl(st, AT91_SAMA5D2_COR); + + if (chan->differential) + cor |= (BIT(chan->channel) | + BIT(chan->channel2)) << + AT91_SAMA5D2_COR_DIFF_OFFSET; + else + cor &= ~(BIT(chan->channel) << + AT91_SAMA5D2_COR_DIFF_OFFSET); + + at91_adc_writel(st, AT91_SAMA5D2_COR, cor); + } + + if (state) { at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); at91_adc_writel(st, AT91_SAMA5D2_IER, |